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Beginner
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Use of EITR register in I210 controller

Hi,

I am using I210 controller.

I have some queries regarding the usage of EITR register in I210 controller in non MSI-X mode.

I am working with non-MSI mode of this controller. My questions are,

1. Is there a way to increase the time gap between the consecutive interrupts in non MSI-X mode?

2. Can I use EITR register in non MSI-X mode.

In 1GBPS link I am getting RXDW interrupt for incoming packets at the interval of ~11us.

But I want to increase this time gap to ~100us.

For that reason I am planning to use "Interval" bit of EITR register.

But when I set value 100 in this field then the interrupt processing stops. Also, I have observed that if I set value <5 then the interrupt processing occurs.

Could anyone give me any idea regarding this?

Thanks in advance,

Sumit Kumar Paul

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Moderator
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Hello, sumitkumarpaul:

Thank you for contacting the Intel Embedded Community.

In order to better understand your questions, we would like to address the following questions:

Could you please tell us if these questions are associated with a technical problem? In case that your answer is affirmative, please give us a detailed description of the issue.

Could you please let us know if the situation is related to an implementation developed by you or a third party design? Please give us all the information if it is a third party design.

Please give us all the information requested on these questions to have a better idea to answer your questions.

Thanks in advance for your cooperation.

Best regards,

Carlos_A.

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Beginner
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Hi Carlos_A,

Thank you for your reply.

This is a situation related to an implementation developed by me.

I am using non-MSIX interrupt mode in I210 controller.

In the case of 1GBPS link I get RXDW interrupt for each received packets. But in this implementation interrupts cannot be processed that fast.

So, I want to get interrupts after at least some time interval( In this case the time is 100us). But I cannot do that.

Do you have any idea regarding this?

Please note I have refereed "Intel® 82574 GbE Controller Family Datasheet". There is a register ITR in 82574 controller for this purpose.

But I have noticed that ITR register is missing in this controller.

So, do you have any idea of how to achieve minimum delay between interrupts to 100us.

Thanks and Regards,

Sumit Kumar Paul

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Moderator
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Hello, sumitkumarpaul:

Thanks for your reply.

The information that may help you is stated in sections 8.8.15 and 8.8.14; on pages 422 and 421 of the http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/i210-ethernet-controller-data... Intel(R) Ethernet Controller I210 Datasheet document # 333016.

We hope that this information may help you.

Best regards,

Carlos_A.

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Beginner
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Thank you Carlos_A for your reply.

I have gone through those chapters. But I have one doubt, whether these registers can be used in the case of non-MSIX interrupt.

I have also tried to used the registers to increase the delay between RXDW to 100us, but that has not worked.(ISR is not called at all by this setting)

Following are the set values of the registers,

======================================

EITR = 0x00000190

IVAR = Not set, default value persists

Do you have any idea regarding this?

Is value set is incorrect?

Do I need to set any other registers/bits to use this feature in non-MSIX register.

Thanks and Regards,

Sumit Kumar Paul

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Moderator
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Hello sumitkumarpaul,

Thanks for your update.

We want to confirm that this register should work in non-msix mode.

On the other hand, could you please explain us the way that this register is being set? Because you told us that you are setting it to 100 uS that should be 64 in hexadecimal (hex). In case that you are not converting to hex, then you are setting it for 256 uS.

Please refer to the information stated in section 8.8.14 of the listed Datasheet for more details as we mentioned on our previous communication.

We hope that this information may help you.

Best Regards,

Carlos_A .

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Beginner
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Hi Carlos_A

Sorry for the late reply.

The issue is now resolved. We can use EITR register in the case of non-MSIX mode also. Previously we were making a mistake of checking 31st Bit of ICR register.

We need to check EICR register in ISR instead.

Please note for the EITR, EICR and IVAR registers are interrelated. We need to use all of them for the correct operation.

To answer your question regarding why we set EITR = 0x00000190, because the bit for the timer starts from bit no. 2(not from bit no. 0)

Anyway thank you very much for your support and co-operation.

Thanks and Regards,

Sumit Kumar Paul

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Moderator
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Hello, sumitkumarpaul:

Thanks for your reply.

Actually, thank you for share the information that may help other persons to solve their issues.

We are glad to hear that your problem has been solved.

Please do not hesitate to contact us again if you have any problem related to Intel Embedded devices.

Best regards,

Carlos_A.

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