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Hi everyone,
we are using a i210IS connected to an FPGA through its SGMII/MDIO interface.
MDIO works fine, but I can't find any information concerning the electrical levels required on the SER_P and SER_N pins, or out of the SET_P and SET_N pins.
Is that information available somewhere?
Thanks!
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Hello, FCh:
Thank you for contacting Intel Embedded Community.
In order to be on the same page, could you please tell us if the requested information is needed to find a solution for a technical problem? In case that your answer is affirmative, please give us a detailed description of the issue.
Waiting for your reply.
Best regards,
Carlos_A.
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