I'm coming from the Processor Forum , they told me to ask here.
I'm looking for the MMIO address map of the GPIO NCORE registers on the Z3600/3700 platform (in my case Atom Z3735G). The datasheet V.2 only seems to cover SCORE and SSUS but not NCORE. Is there any further documentation on this?
What I currently have is a GPIO pin number (0x1a) and an address range (0xfed0d000 - 0xfed0dfff) from ACPI. but I didn't find any information how to map these together.
To provide some further information on what I want to do:
I try to write a touch input driver for an Intel Atom tablet on Genode. The touch controller is connected to the I2C4 bus as a slave device but needs to be enabled first. This can be done either via ACPI (which fails with AE_UNINITIALIZED_ARG, but I think this is off topic here) or via GPIO.
I looked again into the datasheet V.2 and in GPSCORE at the offset 0x1a0 (which corresponds to the pin number 0x1a) is indeed the I2C4 Sda Pad.
The value i read out initially after boot is different to the default value in the datasheet (pull_assign is set to Pull Down instead of Pull Up). I can successfully set the correct Func Pin Mux value but setting the Pad Value seems to have no effect. Also since sda is the I2C data line (afaik) I'm not sure that this is the correct pin.
Thanks in advance,
: https://communities.intel.com/message/480557 Atom Z3600/3700 GPIO NCORE documentation |Intel Communities
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