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Is there anything resembling a programmers reference manual for the E3800 (Bay Trail I)? Something that documents how the SoC devices work? The Datasheet does a good job of describing the registers but nothing on how to use them. I feel like I am missing something obvious but have spent hours searching both the Business Portal and Public side of things and have found nothing beyond the BWG and the EDS, which for some devices contains a little more depth of information but not to the level needed. And the EDS varies by device as to how deep a level it goes into.
Specifically I am looking for documentation on the SIO SPI. I have a lot of it figured out by reverse engineering Lunux SPI drivers. What is most interesting is the closest thing I can find is the PXA2xx driver. That is an ARM chip (XSCALE) but from an SoC device viewpoint. they appear to have come from the same design team. Following that path I find that the Marvell (who bought the XSCALE line from Intel years ago) PXA270 Processors Developers Manual the closest information in documenting the SPI device on the E3800 I can find.
Any pointers to better documentation would be appreciated!
Thanks,
Brett
Moderators - I still cannot post to the "Embedded Community" forums, only to the 英特尔中国嵌入式社区. How do I get that fixed so I can post to all?
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Hello Brett,
Thank you for contacting the Intel Embedded Community.
The information that may help you is stated in the https://www-ssl.intel.com/content/www/us/en/secure/intelligent-systems/privileged/bay-trail/atom-e3800-t-i-soc-spi-flash-programming-guide-update.html Intel(R) Atom(TM) E3800 Processor T/I SoC SPI Flash Programming Guide: Application Note.
On the other hand, in order to help you with your communities problem, please fill out https://signin.intel.com/ContactUs?appid=508 the support form.
Please let us know if this information is useful to you.
Best Regards,
Carlos_A
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Carlos,
Thanks but that is not what I am looking for. That document is just for the PCU SPI bus and the boot flash - a nightmare I have already lived through. (Why the Baytrail-I has to boot in descriptor mode and have the TXE is beyond me - not something I want or need in an embedded product NOT running Windows or Linux.)
I am looking for docs on the SIO SPI. It seems like there is a big omission out of the data sheet for that device as the SIO I2C has enough documentation to at least try programming against but the SPI has virtually nothing. No discussions on the fact that it can do SSP, PSP and Microwire along with SPI. Or that it supports network mode.
I would think (hope?) that there would be app notes for all the different peripherals this device has or some master programming guide. Doesn't seem to be.
Thanks again,
Brett
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Hello Brett,
Thanks for your reply.
Please review the information stated in chapter 17, on pages from 379 to 383 of the http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf Intel(R) 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture document # 233665-005US that may help you.
Please let us know if this information is useful to you.
Best Regards,
Carlos_A.
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Hi Carlos,
No, that chapter just talks about I/O address space.
Unlike most other processors (ARM, PowerPC, etc.) the x86 processors have both Memory and IO address spaces. On the E3800 there are only a few legacy things that use the IO address space, like the PCU UART and the POST codes display but not the SIO SPI.
I really wouldn't expect to see the information I am looking for in any of the 'Architectures' manuals - I am sure these SoC chips account for only a couple of percent, if that, of Intel's total chip production.
Thanks for looking though!
Brett
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I am also having a problem trying to use the SIP SPI port. I have found that Ubuntu 18.04 seems to load both "spi_pxa2xx_platform" and "spi_pxa2xx_pci" modules on boot-up, but udev does not create any /dev nodes for it. I need a LINUX driver expert at Intel to point me in the right direction.
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Hello, @MDalb3:
Thank you for contacting Intel Embedded Community.
Could you please let us know the part number of the processors related to this situation? By the way, could you please clarify if the affected design has been developed by you or a third-party company? Please give all the details (part number, model, name of the manufacturer, where is the documentation) of the project related to this situation if it is a third-party device.
Waiting for your answer to these questions.
Best regards,
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Hi Maecenas,
Thank you for your reply. The Intel Atom Bay Trail CPU chip we are using is Part Number: FH8065301487717.
Intel Atom® Processor E3845, Intel® Atom™ Processor E Series, Products formerly Bay Trail.
I am trying to understand how to use the SIO SPI port under LINUX.
There exists a base driver spi-pxa2xx.c in the LINUX tree, that does get launched in Ubuntu 18.04, but I do not understand how to connect that driver up to a /dev node (e.g. /dev/sipdev0.0).
I would greatly benefit from a document that explains HOW to use the LINUX driver to access the SIO SPI port from user space.
I believe what I need is something to connect the spi-pxa2xx.c platform module to the general spidev driver.
I would love to be granted access to the http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf Intel(R) 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture document # 233665-005US to see if that contains a clue for me, but I do not currently have access to that.
If there is an even better document, I would like BOTH please.
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Hello, @MDalb3:
Thanks for your reply.
Could you please try to reproduce this situation using any of the following Operating System (OS) instead of Ubuntu and let us know the results?
- Linux* Tizen (select in-vehicle infotainment (IVI) customers only).
- Linux based on Yocto Project* Tools.
- Linux based on Fedora* distribution.
- Wind River VxWorks*.
- Microsoft Windows* 8.
- Windows Embedded Standard 8 (non-connected standby).
- Microsoft Windows 7.
- Windows Embedded Standard 7.
- Microsoft Embedded Compact 7.
- Microsoft Embedded Compact 2013.
- Android* (JB MR2 4.3).
Waiting for your answer.
Best regards,
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