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In the External Design Specification (557555) on page 79 in Table 3-15 is written:
“PCIe* Maximum Supported Devices - Up to 4 root ports/external device”.
On page 80 in Table 3-16 is written: 0-5/Device (Root Port RP01-RP6) .
How many PCIE devices can be connected to the E3940 SoC? 4 or 6?
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Hello, @NDeme:
Thank you for contacting Intel Embedded Community.
In order to be on the same page, could you please let us know if the affected design has been developed by you or by a third-party manufacturer? In case that it is a third-party device , please give the model, part number , and where is stated its documentation.
Waiting for your answer.
Best regards,
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Intel Atom® E3900 and Intel Atom®A3900
Processor Series
External Design Specification (EDS) Addendum
March 2019
Revision 2.5
Document Number: 558402-2.5
Page 10
PCI Express*(PCIe*) Gen2 - Number of Ports Same as the N- and J- Series Processors
Intel® Pentium® and Celeron® Processor N- and J- Series (Formerly Apollo Lake)
External Design Specification - Volume 1 of 4
Revision 2.5
October 2018
Document Number: 557555
Page 79
Table 3-15. PCIe* Features
PCIe* Maximum Supported Devices - Up to 4 root ports/external device
Page 80
Table 3-16. PCIe* Port Mapping
0-5/Device (Root Port RP01-RP6)
We use the COM Express processor module (Kontron COMe-mAL10 E2 E3940 4E) and install it on the carrier board of our development. The manufacturer of the COM Express module traced four PCIE lanes from the processor to the module connector and one is used on the module. PCIE devices on our PCB are directly connected to the COM Express module. Is it possible to work all five PCIE x1 devices (4 on our PCB and 1 on the module)?
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Hello, @NDeme:
Thanks for your clarification.
Your should verify with the manufacturer of the board related to this consultation if the information stated on pages 31 and 32 of the Apollo Lake for Internet of Things (IoT) Platforms Design-In document # 557198 is the proper for their design. This document can be found at the following website when you are logged into Resource and Design Center (RDC) privileged account:
http://www.intel.com/cd/edesign/library/asmo-na/eng/557198.htm
Best regards,
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Do I understand correctly that the limitation of 4 PCIE devices comes from, because the SoC has only 4 PCIE_CLK lines. If I connect PCIE Clock Buffer IC to one of the PCIE_CLK lines provided by SoC, I will have more PCIE_CLK lines, and then is it possible to connect 6 PCIE devices?
Apollo Lake for Internet of Things (IoT) Platforms Design-In document # 557198 page 41
“Up to 4 PCIe devices are supported because four 100MHz clocks are provided by SoC.”
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Hello, @NDeme:
Thanks for your reply.
There is no way to support 6 PCIe devices if you increase the Clock buffer.
Best regards,
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On real hardware, all 5 connected PCIE devices are detected by the OS and are fully functional. All PCIE Tx and Rx lines are directly connected to SoC, without PCIE switches. PCIE_CLK lines are connected via Clock Buffer. I want to understand why the specification says - "up to 4 PCIE Devices"?
lspci
….
00:13.0 PCI bridge: Intel Corporation Atom/Celeron/Pentium Processor N4200/N3350/E3900 Series PCI Express Port A #1 (rev fb)
00:13.1 PCI bridge: Intel Corporation Atom/Celeron/Pentium Processor N4200/N3350/E3900 Series PCI Express Port A #2 (rev fb)
00:13.2 PCI bridge: Intel Corporation Atom/Celeron/Pentium Processor N4200/N3350/E3900 Series PCI Express Port A #3 (rev fb)
00:13.3 PCI bridge: Intel Corporation Atom/Celeron/Pentium Processor N4200/N3350/E3900 Series PCI Express Port A #4 (rev fb)
00:14.0 PCI bridge: Intel Corporation Atom/Celeron/Pentium Processor N4200/N3350/E3900 Series PCI Express Port B #1 (rev fb)
…..
01:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)
02:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)
03:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)
04:00.0 Ethernet controller: Intel Corporation I210 Gigabit Fiber Network Connection (rev 03)
05:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)
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Hello, @NDeme:
Thanks for your reply.
The information that may answer your question is stated on page 32 of the Apollo Lake for Internet of Things (IoT) Platforms Design-In document # 557198 as we mentioned on our communication of the past April 2nd, 2019. Please keep in mind that this information must be confirmed by the manufacturer of the device related to this thread.
Best regards,
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