CPU: Intel Denverton C3558
There are two SPI flashs in our DUT. One is a bootflash(16M) connected SPI_CS_N and another flash(32M) is connected to SPI_CS_N.
The bootflash is detected in Linux.
We want to direct access such as read/write CS1 flash.
We had set FLA(BIOS_FADDR) to more than 16mb such as 0x3000000 and expect SPI chip select will switch to 1(SPI_CS_N to low).
But SPI_CS_N pin is still measured high.
We also try to use intel-spi driver to access second flash(32m), but it still failed.
We use intel_spi_write & intel_spi_read and set offset more than first flash(0x1500000 or 0x2500000...etc.).
Could you help us and how to operate register can access the second SPI slave flash?
Thank you for contacting Intel Embedded Community.
Could you please tell us if the affected designs have been designed by you or by a third-party company? In case that they are third-party units please give the part number, model, name of the manufacturer, where it is stated the information related to it. In case that it is your design, could you please clarify it has been reviewed by Intel and the sources that you have used to develop it?
By the way, could you please let us know the Operating System and tools that have used to detect this situation?
We are waiting for your reply.
Our product model is Nanook and its layout had been reviewed by Intel.
The OS is pure Linux and uses devmem to access memory mapping.
We also modified intel-spi driver and it can't read/write the second flash.
Below is error log:
intel-spi 0000:00:1f.5: w25q128 (16384 Kbytes)
Creating 1 MTD partitions on "0000:00:1f.5":
0x000000000000-0x000001000000 : "BIOS"
intel-spi 0000:00:1f.5: read error: 1500000: 0x9006003
intel-spi 0000:00:1f.5: write error: 1500000: 0x9046003
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Updated the latest info.
We modified intel-spi driver and set the first spi flash address is 0x1000000(16mb).
When we remove module and insert module again, Linux will get the second flash(only it).
But its size only 4mb and can't read/write any physical address.
Could you have any suggestions?