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LBuga
Beginner
375 Views

IBIS Model Apollo Lake E3940 for LPDDR4

Hi all.

I want to simulate the interface between E3940 and LPDDR4 in Hyperlynx.

  • How to include in simulation the E3940 package delay? I think it's not present in IBIS file.
  • How to find the models for the different types of ODT?

Best regards.

 

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3 Replies
CarlosAM_INTEL
Moderator
175 Views

Hello, @LBuga​:

 

Thank you for contacting Intel Embedded Community.

 

We suggest you as a reference review the information stated in the following website that may help you:

 

https://www.mentor.com/pcb/multimedia/overview/hyperlynx-support-for-ddr4-and-lpddr4-4fa81818-3406-4...

 

Best regards,

@Mæcenas_INTEL​.

LBuga
Beginner
175 Views

Hello.

Te problem is in your ibis model:

[IBIS Ver]   3.2

[File name]   bxtp_lp4_1p1v.ibs

[File rev]   1.0

[Date]     Tue Dec 30 23:07:03 2014

[Source]    INTcinIBIS vp14ww18.3

 

  • there aren't ODT models
  • there is no package delay for any pins.

 

How can simulate the interface with LPDDR4 without these datas?

Best regards.

LBuga
Beginner
175 Views

Hello.

Do you have any news?

 

Best Regards.

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