The specification update document 336256-003US
Mentions D-0 and F-1 steppings for the various E3900 series parts (E3930, E3940, E3950) which were added in 2019-05 according to the revision history. What I can't find in that document or related documents is what changes were made in the new F-1 stepping.
Specifically I am interested in how the changes affect the errata inherited from the related document no. 334820-008
This documents doesn't even cover the E3900 series directly, only referencing the B-0 and B-1 steppings of the parent Celeron and Pentium parts.
Does someone have documentation that covers the stepping changes and/or errata dispositions?
Thank you for contacting Intel Embedded Community.
The Intel Atom(R) Processor E3900 Series Specification Update Addendum - NDA document #573884 has the information that may help you, please refer to the information stated in Table 4, Section 5.4 and 6.0; on pages 11, 18, 19, and 21 to 24. This document can be found when you are logged into your Resource & Design Center (RDC) privileged account at the following website:
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