Values for Apollo Lake PWM Control Register

[JamesPreciado]

Apollo Lake has a PWM Control Register (PWMCRTL) for each of its PWM output signals.  That register has contains three bit fields that control the frequency of the PWM signal.  These fields are BASE_UNIT_INTEGER, BASE_UNIT_FRACtion and ON_TIME_DIVISOR.

Is there a table of values for the PWMCTRL register showing the value to use for output duty cycles ?  For example, what values would I set PWMCTRL register to in order to generate a 100%, 75%, 50% and 25% duty cycle on the PWM signal output ?

Thanks.

[Diego_INTEL]

Hello @JamesPreciado,

Thank you for contacting Intel Embedded Community.

The main PWM variables that control PWM output are:

• base_unit: Frequency is controlled by the base_unit setting in the PWMCTRL register. The base_unit value is added to a counter every clock. Counter roll-over marks the start of a new cycle.
• on_time_divisor: Duty cycle is controlled by the on_time_divisor setting (0 to 255). When the counter rolls-over it is reset and a new cycle starts with the output signal being 0, once the counter reaches the on_time_divisor value the output toggles to 1 and stays high until the counter rolls over.

So, if on_time_divisor is 0, the duty cycle will be the maximum for the base_unit you set, maybe in a formula can be, 1-(otd/256) I think.

Like if otd is 0, the counter reaches the on_time_divisor value immediately, having a duty cycle of 100%, 50% at 127 and a duty cycle of 0.04% at 255 of the on_time_divisor.

Best regards,

@Diego_INTEL

[JamesPreciado]

Mr. Diego,

THANK YOU !

Your explanation was EXACTLY what I needed.

As I type this, I am looking at a digital Multimeter connected to a DC motor control relay which is in turn connected the PWM0 signal of my Apollo Lake maker board.

I am able to cycle through the entire voltage range.

Fantastic !

[Diego_INTEL]

Hello @JamesPreciado,

That sounds great. I'm glad that I could be of help.

Best regards,

@Diego_INTEL