- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Problem: No MDC/MDIO signal
CPU: Broadwell-DE SoC, 4Core/8T
10G BASE –T PHY: Intel, X557-AT
Flash Image:
1. BDXDE_KR_BACKPLANE_LED_LO_NO_MNG_1.13v02_800006D1.bin
2. BDXDE_10GBASET_NO_MNG_1.13v02_800006B7.bin
===========Eth Info==================
root@genericx86-64:/dni# ethtool -i eth1
driver: ixgbe
version: 5.0.0-k
firmware-version: 0x800006a8
expansion-rom-version:
bus-info: 0000:04:00.0
supports-statistics: yes
supports-test: yes
supports-eeprom-access: yes
supports-register-dump: yes
supports-priv-flags: yes
===========Eth Info End==================
04:00.0 Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane
04:00.1 Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane
Description:
We try to do MDI single r/w through MSCA(0x0000425c) and MSRWD(0x00004260).
The rule and steps is shown below
04:00.0 [Base address] + [offset] [32 bits] [value]
devmem 0x383fff400000+0x0000425c 32 0x501dc501 //Address cycle PHYAD = 0x00
devmem 0x383fff400000+0x00004260 32 0x00002001 //Test Mode 1
devmem 0x383fff400000+0x0000425c 32 0x541dc501 //Write operation
Is it correct?
We also try to use the tool of "lanconf64e" doing "IEEE Tests", but we still cannot got MDC/MDIO signal.
Then, we upgrade flash to BDXDE_10GBASET_NO_MNG_1.13v02_800006B7.bin.
However, the situation is the same.
Another question is when we use BDXDE_10GBASET_NO_MNG_1.13v02_800006B7.bin, the eth cannot link up.
If we change the image to XXX_BACKPLANE..., it can link up in 1G. But, 10G doesn't work...
Why we can't get MDC/MDIO signal?
In backplane mode, why X557 only link up in 1G?
Could you give us some suggestions?
Thanks
- Tags:
- Broadwell
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, Mikeliu:
Thank you for contacting Intel Embedded Community.
In order to better understand your consultation, we want to address the following questions:
Could you please tell us if the affected project is a third party one or it has been developed by you? In case that it is a third party design, please give us all the information related to it. On the other hand, if it is your design, could you please inform us where is stated the information used to develop the affected project? How many units have been manufactured? How many are affected? And, what is the failure rate?
Could you please inform us the part numbers and SKU's of the processor and chipset related to this situation?
Could you clarify us if the Ethernet device is an add-in card or it is part of the affected board? Please give us all the information related to this Ethernet device.
Could you please let us know where do you download the files related to this condition?
Please let us know all the information that should answer our questions.
Waiting for your update.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Carlos_A,
This project is in develop. We manufactured several samples and all of these samples had the same situation.
The phy's datasheet we reference is shown below.
https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/x557-at-at2-at4-10gbe-phy-datasheet.pdf https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/x557-at-at2-at4-10gbe-phy-datasheet.pdf
CPU Info:
================================Start=============================================
root@genericx86-64:/dni# cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 86
model name : Intel(R) Xeon(R) CPU D-1527 @ 2.20GHz
stepping : 3
microcode : 0x700000e
cpu MHz : 801.904
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 20
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 intel_ppin intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a rdseed adx smap xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts
bugs :
bogomips : 4400.03
clflush size : 64
cache_alignment : 64
address sizes : 46 bits physical, 48 bits virtual
power management:
.
..................
================================End=============================================
The document we reference is shown below.
https://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-4.html https://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-4.html
Thanks
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
We notice that MDIO and LED functions share the same interface pins ( LAN_MDIO_LED_[1:0] ).
Is it possible the reason why we cannot get the MDIO signal?
How to check and configure that?
Thanks
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
What the kernel config or driver should be installed if we want to use MDC/MDIO in broadwell D1500?
We already enable MDIO, MDIO_DEVICE and IXGBE now.
Is there anything else missing?
Another question is how to check the NVM is configured to use MDIO functions, because the MDIO and LED functions share the same interface pins.
Is it probably the reason why we can't get MDC/MDIO signal?
Thanks
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, Mikeliu:
Thanks for your update.
In order to help you, we will contact you via email.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Carlos_A,
Could you also email to mailto:jason.ht.huang@deltaww.com jason.ht.huang@deltaww.com
Thanks a lot.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, Mikeliu:
Thanks for your update.
Could you please let us know why we should notify the email address stated in your last communication?
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Carlos_A,
I assigned Jason <</span>mailto:jason.ht.huang@deltaww.com jason.ht.huang@deltaww.com> to deal with this problem.
Thanks
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, Mikeliu:
Thanks for your update.
Following your request, we will re-send our email to the contact that you have listed.
We suggest in order to avoid future delays feel free to re-send our communications from your side.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Carlos_A,
Our external phy x557's base address is "0x383fff400000".
PHYAD = 00000
We want to run IEEE Test Mode and the address is "1D.C501" which is written in x557 datasheet.
We also know that we can use the "MDI Single Command and Address - MSCA 0x000425C and MSRWD" to access external phy.
Could you use our case to give us a detail steps to access external phy through MDC/MDIO?
What value of the DEVADD, OPCODE, STCODE, and MDICMD should be filled in each step?
We want to double check our steps is correct.
Thanks.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, Mikeliu:
Thanks for your reply.
In order to better help you, please follow the suggestions provided in the email sent to you as is stated in our communication of the February 2nd, 2018.
We hope that this information may help you.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Carlos,
can you also share the info, as I have similar problem with my Xeon-D where the MDIO fails to communicate with the external PHY.
Thanks.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, JeySu:
Thank you for contacting Intel Embedded Community.
In order to better understand your consultation, we want to address the following questions:
Could you please tell us if the affected project is a third party one or it has been developed by you? In case that it is a third party design, please give us all the information related to it. On the other hand, if it is your design, could you please inform us where is stated the information used to develop the affected project? How many units have been manufactured? How many are affected? And, what is the failure rate?
Could you please inform us the part numbers and SKU's of the processor and chipset related to this situation?
Could you clarify us if the Ethernet device is an add-in card or it is part of the affected board? Please give us all the information related to this Ethernet device.
Could you please let us know where do you download the files related to this condition?
Please let us know all the information that should answer our questions.
Waiting for your update.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, Carlos
We have the same problem with MDIO on X557-AT2: there are no any packets on MDIO interface. It is not possible to update the PHY firmware using lanconf utility, because the PHY EEPROM is not detected.
Also the link is only 1Gbit .
Could you please also share the solution with me?
This our own developed COM Express module with Xeon D-1539. This issue takes place on all our manufactured samples (5pcs).
The MAC firmware version is BDXDE_10GBASET_NO_MNG_1.13v02_800006B7.bin.
Best regards, Sergey.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, SergeyK:
Thank you for contacting Intel Embedded Community.
In order to help you, we will contact you via email.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Dear Carlos,
We are facing the same problem. But we are not interested the MDIO bus. Our problem is the link speed.
We have been tried all NVM images that we are found but link speed is always 1G not 10G.
Could you please also share the solution with me?
Best Regards
Deniz Kaya
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, Deniz :
Thank you for contacting Intel Embedded Community.
In order to help you, we will contact you via email.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Carlos,
We have the same issue.
CPU is the Broadwell-DE NS and pre-program the "BDXNS_KR_BACKPLANE_NO_MNG_LED_LO_LAN0_MDIOEN_1.17_0.06_80000756.bin" into both LAN0 and LAN1 flashes.
We use the ixgbe-5.3.6 driver.
So far our code can call the ixgbe_mdio_read() function but we always get the reg-value 0xFF.
We probe the MDC and MDIO signal but we can NOT see any MDC/MDIO signal.
Please share the related information to fix the issue.
Thanks.
Ben.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, luben:
Thank you for contacting Intel Embedded Community.
In order to help you, we will contact you via email.
Best regards,
Carlos_A.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Carlos,
We have the same issue.
CPU is the Broadwell-DE NS and pre-program the "BDXNS_KR_BACKPLANE_NO_MNG_LED_LO_LAN0_MDIOEN_1.17_0.06_80000756.bin" into both LAN0 and LAN1 flashes.
We use the ixgbe-5.3.6 driver.
So far our code can call the ixgbe_mdio_read() function but we always get the reg-value 0x00.
We probe the MDC and MDIO signal but we can NOT see any MDC/MDIO signal.
Please share the related information to fix the issue.
From the below log ixgbe driver can probe the eth0.
[ ? 20.190079] ixgbe 0000:03:00.0 eth0: MAC: 5, PHY: 4, PBA No: 000600-000
[ ? 20.197643] ixgbe 0000:03:00.0: 00:a0:c9:00:00:00
[ ? 20.202999] ixgbe 0000:03:00.0 eth0: Enabled Features: RxQ: 16 TxQ: 16 FdirHash vxlan_rx
[ ? 20.217096] ixgbe 0000:03:00.0 eth0: Intel(R) 10 Gigabit Network Connection
[ ? 20.225717] ACPI Warning: \_SB.PCI0.BR2C._PRT: Return Package has no elements (empty) (20160831/nsprepkg-130)
[ ? 20.239076]
[ 20.695716] ixgbe 0000:03:00.1 eth1: MAC: 5, PHY: 4, PBA No: 000600-000
[ 20.703255] ixgbe 0000:03:00.1: 34:12:78:56:01:01
[ 20.708649] ixgbe 0000:03:00.1 eth1: Enabled Features: RxQ: 16 TxQ: 16 FdirHash vxlan_rx
[ 20.710396] irq 18: nobody cared (try booting with the "irqpoll" option)
I run the command "ethtool -i eth0" and get the below message.
# ethtool -i eth0
driver: ixgbe
version: 5.3.6
firmware-version: 0x80000756
bus-info: 0000:03:00.0
supports-statistics: yes
supports-test: yes
supports-eeprom-access: yes
supports-register-dump: yes
supports-priv-flags: yes
Thanks.
Ben.

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page