Help configuring ICH8M to access HW on ISA bus

[idata]

I'm working on an Advantech PCM-9562 board which has Intel Atom N450, Intel ICH8M and ITE IT8888G chipset.

This version of AMI bios for some reason doesn't have any support for configuring the I/O space.

I'm trying to access custom hardware on the ISA bus off of the IT8888G.

It uses just I/O addresses, no memory I/O or interrupts, around 0xA240.

If I scan the PCI busses, I see all the ICH8M peripherals, but not the IT8888G chip.

What registers do I need to set on the ICH8M (and/or the IT8888G) to configure it to allow I/O space to go through to the ISA bus?

Do I just need to clear PCICMD.IOSE so it doesn't subtractively decode the I/O space?

Do I need to change BCTRL bits to positively or not positively forward?

Do I need to configure IOBASE_LIMIT so it decode 16 bits, not 12 bits?

Do I need to configure something on the ICH8 first so I can configure the IT8888G chip to positively decode the I/O space?

[Casey_H_Intel]

Hello Michael,

We are continuing to look into this request. We will reply again when we have information for you.

Best Regards,

Casey H.

[Zheng_J_Intel]

Hi Michael,

I am providing an Intel document which gives guidance on the relative merits of PCI and LPC to ISA devices.

http://www.intel.com/assets/pdf/whitepaper/318244.pdf http://www.intel.com/assets/pdf/whitepaper/318244.pdf

Not sure if you already read this, but i hope it helps.

like section 3.1, it should already anwser your question about the address decoding.

For some other of your detailed questions, I believe you may need to consult your BIOS vendor as well.

Best Regards

Stephen

[idata]

Stephen,

Yes, I had seen that white paper, which really doesn't say much.

It talks about limitations with DMA and PnP which I'm not using and suggests as an alternative that LPC could be used for ISA, which is not the way the Advantech board is designed, so that doesn't apply.

Section 3.1 is about aliasing, which is not the problem I'm seeing. I don't even get an IOR or IOW.

[Casey_H_Intel]

Hello Michael,

In addition to Stephen's linked document, I wanted to comment that the IT888G bridge is a third party manufactured device, so we don't have the documentation on our site for its configuration.

Best Regards,

Casey H.

[FMcNu1]

Hi Michael

We reached out to Advantech about this question. They suggest that you contact their technical support center and their engineer will contact you directly. They also request that you provide additional details about your OS, ISA device and anything you can say about the application.

Here is the link to post your question to Advantech:

http://www.advantech.com/contact/default.aspx?page=contact_form2&subject=Technical+Support http://www.advantech.com/contact/default.aspx?page=contact_form2&subject=Technical+Support

Below is the block diagram for the board you are using.

I hope this helps

Felix

Community Moderator

[idata]

Thank you Felix. I previously tried Advantech support. They suggested contacting QNX and Intel.

I agree this should be part of the Advantech AMI BIOS, but since it is not, I need to do it programmatically through the ICH8M and/or IT8888G registers.

[Adolfo_S_Intel]

Hello Michael

You might want to check section 5.1.2.7 , page 111 of the ICH8 datasheet

Quoting from this section

The PCI bridge in the ICH8 is a subtractive decode agent, which follows the following rules when forwarding a cycle from DMI to the PCI interface:

• The PCI bridge will positively decode any memory/IO address within its window registers, assuming PCICMD.MSE (D30:F0:Offset 04h:bit 1) is set for memory windows and PCICMD.IOSE (D30:F0:Offset 04h:bit 0) is set for IO windows
• The PCI bridge will subtractively decode any 16-bit I/O address not claimed by another agent assuming PCICMD.IOSE (D30:F0:Offset 04h:bit 0) set

If the IT8888G is also configured as a subtractive decode agent also, this would cause a conflict during PCI identification.

You need to configure one of the two bridges, as a positive decode agent, and since you want to have I/O addresses around 0xA240, I would try to configure the IT8888G as a positive decode agent and try to set a window within that range.

You might also want to take a look at section 10.1.23, page 445, of the same document, regarding the Bridge Policy Configuration Register, particularly the Subtractive Decode Policy SDP bit.

Regards,

Adolfo

[idata]

Adolofo,

Thank you for the hints. This is the section of the ICH8 datasheet I was looking at.

[SZann]

I'm working on an Advantech PCM-9562 board which has Intel Atom N450, Intel ICH8M and ITE IT8888G chipset.

This version of AMI bios for some reason doesn't have any support for configuring the I/O space.

Look on the board and make sure that the ITE 8888G chip is actually soldered on.

Try to set the "Plug & Play O/S" option in the bios to No

Maybe there are jumpers to set on the board.

I'm trying to access custom hardware on the ISA bus off of the IT8888G.

It uses just I/O addresses, no memory I/O or interrupts, around 0xA240.

I assume that 0xa240 is the i/o address in the isa bus

Normally you would first configure ich8m to map the ITE 8888G into the required range(s) in the pci address spaces, then configure ITE 8888G to redirect accesses in those ranges to the ISA bus. So that if the ITE 8888G is mapped at address X in the pci bus, doing an i/o port write at address X+0xa240 will generate a transaction on the ISA but at i/o address 0xa240

If I scan the PCI busses, I see all the ICH8M peripherals, but not the IT8888G chip.

How do you scan the pci bus ? Are you using an operating system utility ?

Many operating systems if there is no driver for it they will show it but as an unknown device.

What registers do I need to set on the ICH8M (and/or the IT8888G) to configure it to allow I/O space to go through to the ISA bus?

You need to read the datasheets of both the ICH8M and the ITE 8888G

Do I need to configure something on the ICH8 first so I can configure the IT8888G chip to positively decode the I/O space?

YES, you must map the ITE 8888G into the pci address spaces.

Make sure you know the basic notions about the pci bus workings, its address spaces and configuration methods.

Look on Google for document "PCM-9375_ITE8888_settings.pdf" its for another board but maybe it can help you.

[idata]

Yes, the IT8888 is soldered on. I removed a sticker to verify the part number.

There aren't any jumpers related to PCI bus and nothing in BIOS. It is not PnP issue.

The PCI bus scan is a QNX OS command. I also tried I/O reads/writes per "method 1" of talking on the PCI bus trying all combinations of bus, device, function numbers. I can see the ICH8, but not the IT8888.

I looked at that document PCM-9375_ITE8888_settings.pdf. It is for Phoenix BIOS, not AMI. The Littleboard 735 has AMI bios and has similar IT8888 configurations as the PCM-9375. That's why I thought it strange the AMI BIOS on the PCM-9562 did not have any IT8888 settings.

[idata]

It turns out the default settings on PCM-9562 for ICH8 and IT8888 seem to work fine. If you want to use ISA addresses taken by the LPC super I/O, then you need to disable those through BIOS (disable corresponding serial/parallel port). If you want to use IRQ lines, disable those in the BIOS as well. To use other ISA addresses, there is nothing to do. The ICH8 subtractively decodes them from the DMI bus and routes them to PCI bus where IT8888 decodes them and passes them to the ISA bus. At least that's my understanding of how it is working.

I'm embarrassed to say it was a bad connector. A couple address lines were not making good contact on the ISA connector, so our custom hardware was not able to decode the 0xA240 addresses and generate a chip select. After fixing the connector, all seems well.

[Natalie_Z_Intel]

Thank you for the update, Michael. We are glad that the problem is resolved.

[SZann]

Good.

In the attachment there is the datasheet for the ITE 8888G IT8888G, since i managed to find it.