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I'm and student and i'm looking for the specification of Intel i5-5675c chipset.
The one provided on ark is not complete and i would like to know more concised parameters like RUU, LSQ, CPI of fetch, decode, issue and commit, # of ALU and more.
Is there any document with all this parameters?
I contacted with Intel Support and told me to 'contact embedded support for the details'.
Thanks.
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Hello Jordi,
Note that this processor is not embedded according to the site http://ark.intel.com/ ark.intel.com
This is a Broadwell processor, built in 14nm manufacturing process. http://mark.intel.com/products/88095/Intel-Core-i5-5675C-Processor-4M-Cache-up-to-3_60-GHz http://ark.intel.com/products/88095/Intel-Core-i5-5675C-Processor-4M-Cache-up-to-3_60-GHz
I recommend you to check the document number 325462, Intel 64 and IA-32 Architectures Software Developer's Manula - Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C, available at the following link: http://www.intel.la/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf http://www.intel.la/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-3254…
Please check the following sections:
- 2.2.1 P6 Family Microarchitecture.
- 2.2.3 Intel Core Microarchitecture.
- 10.4.6.3 PREFETCHh Instructions.
- 18.15 Counting Clocks,
I hope this information is helpful,
Regards,
Gabriel Thomas
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Hello Jordi,
Welcome to the Intel Embedded Community,
We will get in contact with you as soon as possible.
Regards,
Gabriel Thomas
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Hello Jordi,
Note that this processor is not embedded according to the site http://ark.intel.com/ ark.intel.com
This is a Broadwell processor, built in 14nm manufacturing process. http://mark.intel.com/products/88095/Intel-Core-i5-5675C-Processor-4M-Cache-up-to-3_60-GHz http://ark.intel.com/products/88095/Intel-Core-i5-5675C-Processor-4M-Cache-up-to-3_60-GHz
I recommend you to check the document number 325462, Intel 64 and IA-32 Architectures Software Developer's Manula - Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C, available at the following link: http://www.intel.la/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf http://www.intel.la/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-3254…
Please check the following sections:
- 2.2.1 P6 Family Microarchitecture.
- 2.2.3 Intel Core Microarchitecture.
- 10.4.6.3 PREFETCHh Instructions.
- 18.15 Counting Clocks,
I hope this information is helpful,
Regards,
Gabriel Thomas
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It is what i was searching.
Thank you very much. It will help me a lot.
Sorry about posting in the wrong section, I just did what support told me.
Jordi.
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Hi Jordi,
No worries, We are glad that this information is helpful.
Do not hesitate to contact us if further assistance is required.
Regards,
Gabriel Thomas

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