I'm trying to execute FSP 1.1 for Skylake (inside Coreboot) and got some problems with RamInit call. I'm fill UpdParams and calling RamInit - but system halted inside this function. Also I'm using LPC PORT80 card, and have some undetermined codes - perhaps it generated inside FPS RamInit function. Codes are: 0x27, 0x29, 0x4c, 0xff. May be have another codes, but my PORT80 card saves only 4 last values.
I can't find any description of this codes in Intel official documentation - so I need help with this.
Also, have another question about Skylake FSP. Can I use FSP with desctop Skylake? What RCOMP values must be used for DDR4 DRAM (in platform design guide this values not present)?
Hello, Zv_mike :
Thank you for contacting Intel Embedded Community.
In order to help you, we suggest you review the information stated in chapters 5.1.3 and 7.3; on pages 13, 14, and 32 of the https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf Intel(R) Firmware Support Package (FSP) External Architecture Specification v1.1 document # 332394.
On the other hand, in order to help you with your RCOMP consultation, could you please give us part number and SKU of the processor related to this question?
We really appreciate your cooperation to solve your questions.
Thanks for answer!
i'm trying to run FSP on Intel Core i5-6600 CPU.
Here some CPU info:
CPU: Intel(R) Core(TM) i5-6600 CPU @ 3.30GHz
CPU: ID 506e3, Skylake H R0, ucode: 000000c1
CPU: AES supported, TXT supported, VT supported
About NVS HOB: I can't get acces to NVS HOB and save it on flash, because system die somewhere inside FspMemoryInit.
If you have been unable to resolve your issue, perhaps my team hear in Ircona can assist you.
We are a design services company based in Dublin, Ireland which specilalisesin x86 hardware and embedded SW design. We are specialists in BIOS and CoreBoot customisation.