Skylake U MSR 0x121 documentation

[pietrushnic]

Hi,

I'm working with firmware code and would like to confirm ACPI Timer Emulation configuration. Which document is relevant to check how to configure that MSR?

Best Regards,

Piotr Król

[CarlosAM_INTEL]

Hello, pietrushnic:

Thank you for contacting Intel Embedded Community.

The information that may help you is stated in section 2.16 of the https://software.intel.com/sites/default/files/managed/22/0d/335592-sdm-vol-4.pdf Intel(R) 64 and IA-32 architectures software developer's manual volume 4: Model-specific registers document # 335592.

We hope that this information may help you.

Best regards,

Carlos_A.

[pietrushnic]

Hi Carlos_A ,

it is not helpful. Mentioned document doesnt' contain information about MSR 121H (aka 0x121). This is MSR with ACPI Timer Emulation bit inside.

Please consult experts and point me to correct document.

[CarlosAM_INTEL · Accepted solution]

Hello, pietrushnic:

Thanks for your update.

We suggest you review with the assistance of your BIOS vendor the information stated in Section 12.16 and Table 12-36, on pages 189 and 190 of the https://cdrdv2.intel.com/v1/dl/getContent/550049 Skylake Processor Family Core and Uncore BIOS Specification document # 550049.

It is accessible when you are logged into your Resource & Design Center (RDC) privileged account. It can be requested by filling out the https://www.intel.com/content/www/us/en/forms/design/contact-support.html RDC Account Support form.

We hope that this information may help you.

Best regards,

Carlos_A .

[pietrushnic]

Carlos_A ,

thanks this is exactly what I asked for.