Tigerlake UP3 no boot up

[flykevin0021]

Hi Intel, 

We have faced a problem during bring up in our in-house project. We use TGL-UP3 i7-1186GRE. 

our bring-up board didn't work. and as we checked that the problem is that PLTRST doesn't de-asserted. When we supply power to the board, all power rails and system signals work well as we expected. but it stops after SYS-PWROK. and no pltrst go to high. 

In the power sequence of PDG, the PLTRST should be de-asserted after sys-pwrok. we checked that all other system signals(all_sys_pwrgd,pch_pwrok,procpwrgd and vccst_pwrgd ) are works well. 

only one suspected that VCCIO power rail is not output from PCH. the VCCIO rail is a FIVR power rail so that should be output after procpwrgd HIGH. but no output at that time. 

question is.. can you explain how to controll the VCCIO power rail. what is the souce power of the VCCIO? which signal is the enable one for VCCIO? 

And can you let me know any check points for this issue? if you have any errata document for board bring up issue, please share that for us. 

Thank you for your support. 

Kevin Kim 

[Diego_INTEL]

Hello @flykevin0021,

Thank you for contacting Intel Embedded Community.

We have a Board Bring Up guide, please check the following document in RDC:

#730333 - Board Bring Up Debug Cookbook

Best regards,

@Diego_INTEL 

[flykevin0021]

Hi, 

Thank you for reply and the guidance that is helpful to debug an issue. 

Unfortunately we are still debugging the booting issue. So I'd like to get review the power-up-checklist that we measured and filed for our project.  can you review the file? 

As we checked, we found several problem. 

1. no VCCIO power rail output : the VCCIO power is an internal power from PCH. I'm not sure what we should be checked for no VCCIO. Can you guide? 

2. no PLTRST : I think this is related with no VCCIO that may affect to PLTRST deassertion. 

As you see the checklist, all other power sequence are no matter beside some of power rail is a little bit low but I think that is not critical. anyway if you can review the file, that would be very helpful. 

Thank you very much for your help. 

Kevin Kim 

[flykevin0021]

file attached - TGL_UP3_Power_up_checklist

[Diego_INTEL]

Hello @flykevin0021,

I will check the information but I think it may be best to use the IPS support for a better support regarding this issue.

https://www.intel.com/content/www/us/en/support/articles/000057045/ethernet-products.html

Best regards,

@Diego_INTEL 

[flykevin0021]

Hi Diego, 

Thank you for your support and I will try to submit it to the IPS support. anyway please help to review that in your side as well. 

Thank you, 

Kevin Kim