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RBran6
Beginner
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What did the host cpu on PCIe read completion abort (ERR_NONFATAL)?

Hello to all.

What did the host cpu (Intel-Core-i-Serie) do when a PCIe read completion abort occur (no advanced error reporting is enabled)?

In my imagination: If the host cpu initiates a pci-memory-space-read and if the response was a read completion abort, the root complex translates the completion abort in ERR_NONFATAL. But what did the host cpu in this case? Did an general fault exception or an machine check exception occur?

Thank you.

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FMcNu1
Valued Contributor I
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Welcome to the Intel® Embedded Community.

I want to make you aware of a special place to go with questions like yours. The Intel® e-Help desk is staffed by Intel representatives who support select Intel embedded platforms including Intel Core™ i series

To access e-Help, you need to be a Privileged member of the Intel® Embedded Community.

If you are not already a Privileged member, you can request an upgrade to your community account here:

https://edc.intel.com/My-Account.aspx https://edc.intel.com/My-Account.aspx

In addition to access to e-Help, Prvileged members may also access the confidential content within the Intel® Embedded Design Center, such as design documents, specifications, and training materials.

I hope this helps.

Felix

J. Felix McNulty

Community Moderator (Intel contractor)

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