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ARio
Beginner
3,188 Views

i801_smbus interrupt timeout on Broadwell-DE

Hello,

I am running Debian Jesse on an Intel Broadwell-DE and I am having difficulties enabling the SMBUS drv=i801_smbus) interrupts.

I removed the "i2c_i801 disable_features-0x10" in the options.config file under '/etc/modprobe.d' but interrupts are not working.

The i801_smbus driver is setup to enable the 'INTREN' bit of SMBUS Host control register (SMBUS-D31:f3).

According to spec, when this bit is enable the completion of a command is supposed to interrupt the processor.

I can see the interrupt pending in the PCI configuration space of the SMBUS device but its seems the CPU never sees this interrupt.

The interrupt counters in '/proc/interrupts' never get updated and i2c operations timeout, see printouts below.

As shown below, i enabled the apic=debug via the kernel command line but it seems the registers displayed are the values

before the SMBUS driver gets a chance to allocate its interrupt.

Do you know of any utilities/commands to display the local-APIC and IO-APIC contents?

Any ideas why processor is not seeing the interrupt? Perhaps, there is a MSR type register in the CPU core that needs to be enabled,

sort of like a global interrupt enabled bit??

I would appreciate your help in this matter.

thank you,

#

:~$ cat /proc/interrupts

CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7

0: 11 0 0 0 0 0 0 0 IR-IO-APIC 2-edge timer

4: 5399 0 0 0 0 0 0 0 IR-IO-APIC 4-edge serial

9: 0 0 0 0 0 0 0 0 IR-IO-APIC 9-fasteoi acpi

  1. 18: 0 0 0 0 0 0 0 0 IR-IO-APIC 18-fasteoi i801_smbus

24: 3535 0 0 0 0 0 0 0 IR-PCI-MSI 512000-edge ahci[0000:00:1f.2]

25: 1 0 0 0 0 0 0 0 IR-PCI-MSI 2621440-edge eth0

26: 65305 0 0 0 0 0 0 0 IR-PCI-MSI 2621441-edge eth0-TxRx-0

#

The PCI config space of the SMBUS device shows interrupt pending on PCISTST register (bit3, offset6-7):

#

:~$ sudo lspci -s 0000:00:1f.3 -vv -xxx -k

00:1f.3 SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller (rev 05)

Subsystem: Intel Corporation Device 7270

Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- SERR-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at fe41a000 (64-bit, non-prefetchable) [size=256]

Region 4: I/O ports at 2020 [size=32]

Kernel driver in use: i801_smbus

00: 86 80 22 8c 03 00 88 02 05 00 05 0c 00 00 00 00

10: 04 a0 41 fe 00 00 00 00 00 00 00 00 00 00 00 00

20: 21 20 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 00 00 00 00 00 00 00 00 07 03 00 00

40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b1 0f 06 08 00 00 00 00

#

The device driver (i801_smbus) times-out with any I2c operation:

#

:~$ sudo i2cdetect -y 0

0 1 2 3 4 5 6 7 8 9 a b c d e f

00: i801_smbus 0000:00:1f.3: Timeout waiting for interrupt!

i801_smbus 0000:00:1f.3: Transaction timeout

-- i801_smbus 0000:00:1f.3: Timeout waiting for interrupt!

i801_smbus 0000:00:1f.3: Transaction timeout

-- i801_smbus 0000:00:1f.3: Timeout waiting for interrupt!

i801_smbus 0000:00:1f.3: Transaction timeout

-- i801_smbus 0000:00:1f.3: Timeout waiting for interrupt!

i801_smbus 0000:00:1f.3: Transaction timeout

-- i801_smbus 0000:00:1f.3: Timeout waiting for interrupt!

#

Following are details of the platform:

#

:~$ inxi -F

System: Host: debian Kernel: 4.9.8-platina-mk1-amd64 x86_64 (64 bit)

Console: tty 0 Distro: Debian GNU/Linux 8

Machine: Mobo: Intel model: Camelback Mountain Platina DC v: 1.0

Bios: coreboot v: 6a724f1-dirty date: 03/14/2017

CPU: Quad core Intel Xeon D-1527 (-HT-MCP-) cache: 6144 KB

Clock Speeds: 1: 2194 MHz 2: 2194 MHz 3: 2194 MHz 4: 2194 MHz

5: 2194 MHz 6: 2194 MHz 7: 2194 MHz 8: 2194 MHz

Graphics: Card: Failed to Detect Video Card!

Display Server: N/A driver: N/A

tty size: 80x24 Advanced Data: N/A out of X

Network: Card-1: Broadcom Device b960

IF: N/A state: N/A speed: N/A duplex: N/A mac: N/A

Card-2: Broadcom Device b960

IF: N/A state: N/A speed: N/A duplex: N/A mac: N/A

Card-3: Intel Device 15ab

IF: N/A state: N/A speed: N/A duplex: N/A mac: N/A

Card-4: Intel Device 15ab

IF: N/A state: N/A speed: N/A duplex: N/A mac: N/A

Card-5: Intel I210 Gigabit Network Connection driver: igb

IF: eth0 state: up speed: 1000 Mbps duplex: full

mac: 02:46:8a:00:0b:86

Drives: HDD Total Size: 128.0GB (17.9% used)

ID-1: /dev/sda model: SanDisk_SD8SMAT1 size: 128.0GB

Partition: ID-1: / size: 102G used: 6.2G (7%) fs: ext4 dev: /dev/sda2

ID-2: swap-1 size: 17.06GB used: 0.00GB (0%) fs: swap dev: /dev/sda3

RAID: No RAID devices: /proc/mdstat, md_mod kernel module present

Sensors: None detected - is lm-sensors installed and configured?

Info: Processes: 110 Uptime: 6:22 Memory: 69.7/16014.7MB

Init: systemd runlevel: 5 Client: Shell (bash) inxi: 2.1.28

#

Enabling the "apic=debug" gives a view of the Local-APIC and IO-APIC during initialization, see 'dmesg' log below.

It seems this view is displayed before the i801_smbus has a chance to allocation the interrupt via its request_irq() system call

since pin12 (irq12 = 18decimal) is disabled.

#

[2.079044] printing local APIC contents on CPU# 0/0:[2.079046] ... APIC ID: 00000000 (0)[2.082155] ... APIC VERSION: 0106...
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7 Replies
Adolfo_S_Intel
Moderator
917 Views

Hello, aureliorio,

Please try to reproduce the issue on a different Linux distribution, to check that this issue is not OS dependent.

Could you please clarify if the board is manufactured by your company or by a third party vendor?

Have you tried to increase the dmesg buffer size to see if you can check more information?

If not try with "log_buf_len=n" where n is the size of the buffer.

Best regards,

Adolfo Sanchez

ARio
Beginner
917 Views

Hi Adolfo,

i tried an older kernel but it did the same thing, see below.

And yes to your other question. The board was designed and manufactured by us.

It is based on Intel's Camelback Mountain CRB.

I have not tried increasing the size of dmesg buffer. Not sure what the default is.

I will experiment with this....

i tried adding the "enable_irq(dev->irq);" to the driver code, thinking that maybe it was not,

but it did the same thing....

thanks,

:~$ inxi -F

System: Host: debian Kernel: 4.6.0-rc2-platina-mk1-amd64 x86_64 (64 bit)

Console: tty 0 Distro: Debian GNU/Linux 8

Machine: Mobo: Intel model: Camelback Mountain Platina DC v: 1.0

Bios: coreboot v: 6a724f1-dirty date: 03/14/2017

CPU: Quad core Intel Xeon D-1527 (-HT-MCP-) cache: 6144 KB

Clock Speeds: 1: 2194 MHz 2: 2194 MHz 3: 2194 MHz 4: 2194 MHz

5: 2194 MHz 6: 2194 MHz 7: 2194 MHz 8: 2194 MHz

Adolfo_S_Intel
Moderator
917 Views

Hello, Aurelio,

Thanks for your feedback.

Could you please try with a different Linux distribution like Fedora or Ubuntu, and not just with an older kernel version of Debian?

Please make sure that the microcode and firmware (sps, fsp) are updated to the latest version.

I will be waiting for your feedback.

Best regards,

Adolfo Sanchez

ARio
Beginner
917 Views

Hi Adolfo,

I will try the ubutu but this might take a bit longer (i'm actually a hardware buy).

Our build environment is for debian and not sure how to build a ubuntu from scratch.

I figure I might need to modify I2c driver. So, better be able to build it from scratch.

We are using the latest FSP (gold_001). How do i find the latest microcode (SPS?

we're using:

CONFIG_CPU_MICROCODE_HEADER_FILES="3rdparty/intel-blobs/microcode/cpu/broadwell_de/M1050663_07000009.h 3rdparty/intel-blobs/microcode/cpu/broadwell_de/M1050662_0000000F.h 3rdparty/intel-blobs/microcode/cpu/broadwell_de/MFF50661_F1000008.h"

Adolfo_S_Intel
Moderator
917 Views

Hello, Aurelio,

Thanks for your feedback.

Could you please clarify what do you mean by your build environment? Are you customizing the Debian distro in some way to suit your board?

Is it possible for you to test with a Ubuntu Live USB? This way would not require any changes to the original OS of your board.

Are you developing your own firmware or you are working with a BIOS vendor?

Have you signed a CNDA with Intel?

To check the SPS code you can use the SPSInfo tool that comes with the SPS kit, if you don't have the kit, there are other third party tools available that can be used to read information from the spi. However since this are not officially approved by Intel I cannot recommend any in particular.

Best regards,

Adolfo Sanchez

ARio
Beginner
917 Views

Hi Adolfo,

Not much customization of Debian (Other than some new I2c driver/i2c interrupt handlers, perhaps). Sometimes we need to update its kernel. So, we're able to build it from scratch. The software team builds/develops our apps in this environment. I am task with coming up with a driver to handle SMBUS_ALERT interrupt going into the Broadwell-DE cpu and that's the reason I am playing with the I2c_i801 driver.

Our product comes with Ubuntu 14.04 installed from our manufacturer. I played with it and it turns out Ubuntu is not using the i2c_i801 module. It is blacklisted in Ubuntu and never sets up any interrupts, see picture below. Ubuntu is using a alternative way for the i2c. Maybe, it is the i2c-algo-bit.ko module. in any case, it doesn't configure any interrupts.

we're using open-source coreboot for the CPU BIOS.

Yeah, i am pretty sure we have an NDA in place.

I thought coreboot was loading the microcode?? maybe, that's something different. We're can i find info about the SPS code? i search datasheets/manuals but couldn't find any description.

thanks,

Adolfo_S_Intel
Moderator
917 Views

Hello, Aurelio,

Regarding your consultation about the MCU, indeed coreboot loads the MCU, however it is necessary to provide the most uptodate MCU file to coreboot.

As for SPS: "Server Platform Services(SPS) is an essential Firmware part of all Intel® Server platforms running inside PCH. The SPS Firmware not only provides service that allows the platform to boot, but also provides value added services to customers such as advanced power management on single and multi-node platforms, monitoring of CPU utilization, efficient thermal management assist capabilities, RAS Management (aka Dengate) and MCTP transport over PCIe."

Maybe you are more familiar with the term Managemente Engine? It serves the same purpose.

Are you the person in charge of the firmware part also? If not, I think you should consult this with your BIOS developer.

For what I have seen the i2c-algo-bit.ko is dependent on a driver called i2c-core.ko that seems to have its own interrupt handler: http://lxr.free-electrons.com/source/drivers/i2c/i2c-core.c

I would recommend also that you consult with the i2c driver developer community, here is the mailing list: mailto:linux-i2c@vger.kernel.org linux-i2c@vger.kernel.org

Best regards,

Adolfo Sanchez

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