Based on requirement we are using Intel® Xeon® D-1559 Processor and planning for SI/PI simulation in Hyperlynx. Requesting to share the IBIS and AMI model to perform simulation for High speed Interfaces DDR4,10G,PCIE gen 3 and gen2,1G,SATA,USB 3.0.
If any support documents for simulation and necessary models kindly share it.
Thank you for contacting Intel Embedded Community.
The Broadwell-DE SoC PCI Express 3.0 Signal Integrity Models document # 610162, Broadwell-DE SoC Serial ATA [SATA] Signal Integrity Model User Guide for the Grangeville Platform document # 576277, Intel Xeon D-1500 Product Family DDR4 Signal Integrity Model Users Guide [MUG] document # 545924, and Grangeville DDR3L Signal Integrity MUG document # 551581 have the information that may help you. These documents can be found when you are logged into your Resource & Design Center (RDC) privileged account at the following websites:
The RDC Account Support form is the channel to process your account update request and any inconvenience related to the cited sites. It can be found at:
Hi @Maecenas_INTEL (Intel),
We have downloaded the shared link files. We couldn't able to find IBIS-AMI files which is compatible with Mentor-Hyperlynx.
We have received Synopsys Hspice models (with decks and Models) for the Intel® Xeon® D-1559 Processor .
As per Model user guide, we understood Simulations are required to perform in SISTAI. Shared models and decks support simulations in SISTAI.
Requesting to share IBIS-AMI model compatible with Mentor-Hyperlynx to perform SI/PI Simulation.
We have gone through the above link and finding difficulties and challenges to use the supplied Hspice models in the Hyperlynx tool,
Requesting to provide us IBIS-AMI compatible Models, which we can use in the Hyperlynx tool for the simulation.
Thanks for your reply.
The available models can be found inside of the listed documents # 610162, 576277, and 545924.
In case of the document # 610162 please go to “Grangville-BDW-DE-PCIe3-rev06” file, next go to “models” file.
For the document # 576277 please go inside of the “BDW_DE_SATA_SI_Model_Rev0p6” file then go to “models” file.
Finally for the doc # 545924 please go to “SODIMM” or “RDIMM” files.
In case that the available information does not fit to your needs , please address your request to the tool mentioned at the following websites:
Thanks for your update.
It is important to let you know that the document number 552660 has been changed by 566772. Due to this fact, the Intel Xeon Processor D 1500 Product Family USB 3p0 Signal Integrity Model User Guide for the Grangeville Platform can be found at the following website when you are logged into your Resource & Design Center (RDC) privileged account:
The RDC Account Support form is the channel to process your account update request. It can be found at: