We have designed a custom board based on xeon D1559 processor. We used on board DDR4 memory chip of 8Gb(512*16 configuration). The memory per channnel is 4GB (1GB * 4 chips).
We prepared the SPD binary and provided it as memory down configuration. We are using the Grangeville fsp package (BDXDE_FSP_MR_002_RC5_20161115).
While the system boots up, the memory test failed. Our memory is in x16 configuration but the current code seems to test memory in x8 configuration. I have attached the debug log for reference.
Please let us know if any specific changes are required in MRC or in SPD to detect the memory successfully.