JTAG access on ICELAKE D LCC

[Agamemnon]

I'm trying to access JTAG on a board that includes an ICELAKE D LCC 3DDR NAC. The CPU and PCH are mounted in series. Is there a special configuration at startup for access because the BSDL file of the PCH gives some instructions to apply that I tried to do but it doesn't work.

I've included bsdl and svf files

Thanks for the answers

[CarlosAM_INTEL]

Hello,  @Agamemnon:

Thank you for contacting Intel Embedded Community.

We want to address the following questions to understand this situation:

Could you please clarify if this request is related to a design developed by you, or if it is a third-party company device?

Could you please let us know the name of the manufacturer, the part number, and where we can find the information if this request is related to a third-party design?

We are waiting for your answer.

Best regards,

@CarlosAM_INTEL.

[Alcide]

Hello,

I just got back on the project.

This request is related to a device from a third-party company

The device in question is an ICELAKE from INTEL: INTEL XEON D-1746TER

Best regards,

Steph