We are trying to bringup a new PCB, based on the Power sequence described in BDW_DE_SoC_EDS_vol3._544042_R2_1.pdf.
Judging by the SOC outputs, sequence is proceeding correctly nearly till the end (we see SOC de-asserting SLP_S4_N and SLP_S3_N, asserts DRAM_PWR_OK, activates clocks, ands read from SPI bus).
However for some reason PROCPWRGD_PCH and PLTRST_N never go inactive.
We checked several critical outputs from CPU (such as CATERR_N, FIVR_FAULT). but all seem to be ok.
Can anyone advise how to root cause the reason why PROCPWRGD_PCH is not deasserted by the SOC? e.g. which signals to check?
Thank you for contacting Intel Embedded Community.
In order to be on the same page, could you please give us the part numbers and SKUs of the processors related to this thread?
By the way, could you please tell us if the affected project has been designed by you or a third-party company? In case that it is a third-party unit, could you please give us all the information related to it?
Waiting for your answer to these questions.
Please see blow my answers:
Intel® Xeon® Processor D-1539/D-1559
GG8067402569000 SR2DH (D-1539)
GG8067402570801 SR2M5 (D-1559)
Thanks for support..
Company website: www.rugged.com
Hello, MaximAlter :
We really appreciate the provided information.
However, we need the answer to the following questions:
Could you please tell us if the affected project has been designed by you or a third-party company? In case that it is a third-party unit, could you please give us all the information related to it?
Waiting for the requested information.
Sorry for delay..
Our Project is C877 SBC I/O 3U VPX based on Xeon D-1500 that designed and manufactured by us (Aitech Systems).
There is NO third-party company envolved in this project.