We are trying to bringup a new PCB, based on the Power sequence described in xeon-d-1500-datasheet-vol-3 R2.pdf
Judging by the SOC outputs, sequence is proceeding correctly nearly till the end (we see SOC de-asserting SLP_S4_N and SLP_S3_N, asserts DRAM_PWR_OK, activates clocks, ands read from SPI bus).
However for some reason PROCPWRGD_PCH and PLTRST_N never
Can anyone advise how to root cause the reason why PROCPWRGD_PCH is not deasserted by the SOC? e.g. which signals to check?
Thank you for contacting Intel Embedded Community.
You should review the information stated in Table 3-35, and sections 18.104.22.168, 22.214.171.124, 3.12.11, 126.96.36.199, 188.8.131.52, 5.1.69, 7.7.5, 184.108.40.206, and 7.9.5; on pages 112, 113, 67, 107, 108, 111, 114, 167, 242, 313, 317, and 340 of the Intel(R) Xeon(R) Processor D-1500 Product Family External Design Specification [EDS] Volume 5 of 5: Integrated Platform Controller Hub document # 544044. This document can be found when you are logged into your Resource & Design Center (RDC) privileged account at the following website:
The RDC Account Support form is the channel to process your account update request. It can be found at: