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Idaville LCC

LisaXu
Beginner
306 Views

Dear Intel Team:

we check the document <Idaville LCC Platform Design Guide (PDG)>, it shows I2C/SMBUS PCB trace length should be kept in below 30 inch. 

In my opinion, we ususally use ~3pF/inch for I2C trace length calculation, and 30inch just 90pF, it is highly below I2C standard 400pF, So could you share why you define the 30 inch PCB trace length restrict? 

Thanks!

Best Regards

Lisa

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1 Solution
Azeem_Intel
Employee
263 Views

Hello LisaXu,



Greetings for the day!



The requested query is related to the PCB. We kindly request you to submit your query in the FPGA forum, where they will provide complete information.

 


https://community.intel.com/t5/FPGA/ct-p/fpga



Best Regards,


Azeem_Intel


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3 Replies
Azeem_Intel
Employee
264 Views

Hello LisaXu,



Greetings for the day!



The requested query is related to the PCB. We kindly request you to submit your query in the FPGA forum, where they will provide complete information.

 


https://community.intel.com/t5/FPGA/ct-p/fpga



Best Regards,


Azeem_Intel


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LisaXu
Beginner
250 Views

Hello Azeem:

Thanks for your recommendation,And I have posted a new one per the link you shared,

LisaXu_0-1716529741108.png

Best Regars

Lisa

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Simon-Intel
Employee
237 Views

Hi LisaXu,


Thank you for confirming that you have posted your query to the FPGA community. We will proceed with archiving this case.


Please don't hesitate to ask any further questions in the future. Feel free to start a new conversation, as this thread will no longer be monitored.


Regards,

Simon


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