I would like to know the Packet timestamp sampling latency of X550 controller at different link spped.
For example in the i210 datasheet in the section 220.127.116.11 (Capture Time Stamp Mechanism) there is a table summarizing the packet timestamp sampling latency of the i210 controller.
In the X550 datasheet section 18.104.22.168 (Time Stamping Mechanism) this information is missing.
Please help find this information for the X550 controller.
Good day. Further checking currently we do not have the information.
If you would like to work with your Intel sales representative, they
might have some more option depend on the size of the sales for further validation.
Hope the above clarified.