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Altera_Forum
Honored Contributor I
1,167 Views

protected altera_xcvr_atx_pll_ip_inst

when running ModelSim on (from AlteraWiki) http://www.alterawiki.com/wiki/single_port_ll_ethernet_10g_mac_with_1588_using_native_phy_design_exa... 

it compiles nicely until the error message: 

# Loading work.avalon_st_eth_packet_monitor# ** Fatal: Error occurred in protected context.# Time: 0 ps Iteration: 0 Protected: /tb_top/dut/atx_pll_inst/altera_xcvr_atx_pll_ip_inst/<protected> file: nofile# FATAL ERROR while loading design# Error loading design# Error: Error loading design# Pausing macro execution# MACRO ./testbench/tb_run_simulation.tcl PAUSED at line 76 

 

Apparently the altera_xcvr_atx_pll_ip_inst is encrypted / protected. The file itself exists. Is there a means to make it available? 

 

Thanks, Pieter_CO
0 Kudos
5 Replies
Altera_Forum
Honored Contributor I
250 Views

Hi, 

 

I have recreated the scenario.I faced the same issue. 

we come back on this issue soon. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
250 Views

 

--- Quote Start ---  

Hi, 

 

I have recreated the scenario.I faced the same issue. 

we come back on this issue soon. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation) 

--- Quote End ---  

 

 

Hi Anand, 

 

Looking forward to it...Regards, Pieter
Altera_Forum
Honored Contributor I
250 Views

Hi Anand, 

 

Your collegues also suggested to use newer designs, but those are all netlist/gatelevel lists, and i am (not yet) familiair with that. (i will follow a DOULOS VHDL course next next week) (in Europe we are more oriented towards VHDL then Verilog). Most, if not all, of your designs are in (S)Verilog i noticed. 

 

I found this file while compiling avalon_driver.sv:  

 

vlog -work work -sv -stats=none C:/Altera/15.0/projects/LL_10G_Ethernet/testbench/avalon_driver.sv 

Model Technology ModelSim ALTERA vlog 10.3d Compiler 2014.10 Oct 7 2014 

-- Compiling package avalon_if_params_pkt 

-- Compiling module avalon_bfm_wrapper 

-- Importing package avalon_if_params_pkt 

-- Compiling package default_test_params_pkt 

** Error: C:/Altera/15.0/projects/LL_10G_Ethernet/testbench/avalon_driver.sv(77): (vlog-13006) Could not find the package (avalon_mm_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line. 

 

I cannot find the package anywhere: altera_xcvr_atx_pll_ip_inst that initially caused the error. Not at all. Nowhere. 

 

But i could find avalon_mm_pkg at another location, and added it to the project(I added the line numbers manually) 

So this is avalon_mm_pkg.sv: 

 

// Copyright (C) 2017 Intel Corporation. All rights reserved. 

// This simulation model contains highly confidential and 

// proprietary information of Intel and is being provided 

// in accordance with and subject to the protections of the 

// applicable Intel Program License Subscription Agreement 

// which governs its use and disclosure. Your use of Intel 

// Corporation's design tools, logic functions and other 

// software and tools, and its AMPP partner logic functions, 

// and any output files any of the foregoing (including device 

// programming or simulation files), and any associated 

// documentation or information are expressly subject to the 

// terms and conditions of the Intel Program License Subscription 

// Agreement, the Intel Quartus Prime License Agreement, the 

// Intel FPGA IP License Agreement, or other applicable license 

// agreement, including, without limitation, that your use is  

// for the sole purpose of simulating designs for use exclusively 

// in logic devices manufactured by Intel and sold by Intel or  

// its authorized distributors. Please refer to the applicable 

// agreement for further details. Intel products and services 

// are protected under numerous U.S. and foreign patents,  

// maskwork rights, copyrights and other intellectual property laws. 

// Intel assumes no responsibility or liability arising out of the 

// application or use of this simulation model. 

// ACDS 17.1std 

// ALTERA_TIMESTAMP:Fri Oct 27 04:32:25 PDT 2017 

// encrypted_file_type : local_encrypted 

`pragma protect begin_protected 

`pragma protect version = 1 

`pragma protect encrypt_agent = "Model Technology", encrypt_agent_info = "6.6e" 

`pragma protect author = "Altera" 

`pragma protect data_method = "aes128-cbc" 

32 `pragma protect key_keyowner = "MTI" , key_keyname = "MGC-DVT-MTI" , key_method = "rsa" 

33 `pragma protect key_block encoding = (enctype = "base64", line_length = 64, bytes = 128) 

34 nlWaqtLd5ErZFeP4I/e0EHkx3Y/AAcE5u0GZFCKULYMu5dTUzWc90frsfESjYrhb 

35 6OY+PsufkmTs07Pugfd+Bdb5ER8vUcsl/MrtJUZYzewz04F+VO/BD+F3lo4JMudp 

36 XZjKc2iBnCHM9qYl8nf7qWCHpvd1uxcmmgsgjMj+2pI= 

37 `pragma protect data_block encoding = (enctype = "base64", line_length = 64, bytes = 3232) 

38 puzxU/N8Qs0QMogbeNkVMRSda1REk6KCccA9UEnuie178tf0qPzmQjkNvadNSxyE 

39 wPzdERfkbjfOI+6wclfnmkiecenk77uxwo4or81oz1ggfkwbwouy/w9cyds27+si /// 6wclfnMKIEcEnK77uXWo4or81oZ1ggFKwBWOuY is indicated to be wrong !!!  

40 x6L4t9R8r6LpquKVPPt5d0IzFwmQBnAH6bsQpFY3vMA7itz000hLeBHtB82Wz2zY 

n1SJcdVpOl5TY3Pl2aH7GVnao9pTD9cO49uWIZJdUj5cWEb+VA/T0kpnw3Sa2ZWr 

and so on, and so on...
Altera_Forum
Honored Contributor I
250 Views

Hi, 

 

Which quartus and Modelsim version are you using? 

Try using quartus II aria 10 edition software. 

where we can simulate the project without loading problem. 

http://dl.altera.com/arria10/13.1a10/?edition=standard 

 

Let me know if this has helped resolve the issue you are facing or if you need any further assistance. 

https://alteraforum.com/forum/attachment.php?attachmentid=15003&stc=1  

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
PVanL
Novice
250 Views

Hi Anand, I little more experienced now, i build a PHY for the cyclone10GX. I now want to connect the LL 10G MAC to it, and now trying to run the alt_em_10g32_EXAMPLE_DESIGN generated by QUARTUS version 18.0.0 build 219 04/24/2018 SJ Pro Edition with Cyclone10GX libraries. Modelsim version starter edition 10.6C, revision 2017.07.

I managed to get the msim_setup.tcl script running, until i face the same issue again: when it compiles avalon_driver.sv, in line 66 it wants to import avalon_mm_pkg, but this file does not exist.

Modelsim reports (after compiling some stuff)

# Top level modules:

# End time: 18:02:38 on Jun 25,2019, Elapsed time: 0:00:08

# Errors: 0, Warnings: 584

# Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017

# Start time: 18:02:38 on Jun 25,2019

# vlog -reportprogress 300 C:/intelfpga_pro/18.0/quartus/eda/sim_lib/cyclone10gx_hip_atoms.v -work cyclone10gx_hip_ver

# -- Compiling module cyclone10gx_hssi_gen3_x8_pcie_hip

# -- Compiling module twentynm_hssi_gen3_x8_pcie_hip

#

# Top level modules:

#   cyclone10gx_hssi_gen3_x8_pcie_hip

#   twentynm_hssi_gen3_x8_pcie_hip

# End time: 18:02:38 on Jun 25,2019, Elapsed time: 0:00:00

# Errors: 0, Warnings: 0

# [exec] com

# Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017

# Start time: 18:02:38 on Jun 25,2019

# vlog -reportprogress 300 -sv ../../../rtl/phy/altera_eth_10gbaser_phy/altera_xcvr_native_a10_180/sim/altera_xcvr_native_a10_functions_h.sv -work altera_common_sv_packages

# -- Compiling package altera_xcvr_native_a10_functions_h

#

# Top level modules:

#   --none--

# End time: 18:02:38 on Jun 25,2019, Elapsed time: 0:00:00

# Errors: 0, Warnings: 0

# Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017

# Start time: 18:02:38 on Jun 25,2019

# vlog -reportprogress 300 -sv "+incdir+../models" ../models/tb_top.sv

# -- Compiling package eth_register_map_params_pkg

# -- Compiling package avalon_if_params_pkt

# -- Compiling module avalon_bfm_wrapper

# -- Importing package avalon_if_params_pkt

# ** Error: ** while parsing file included at ../models/tb_top.sv(19)

# ** at ../models/avalon_driver.sv(66): (vlog-13006) Could not find the package (avalon_mm_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.

# End time: 18:02:39 on Jun 25,2019, Elapsed time: 0:00:01

# Errors: 1, Warnings: 0

# ** Error: C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed.

# Error in macro ./mentor.do line 25

# C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed.

#    while executing

# "vlog -sv  {+incdir+../models} "../models/tb_top.sv" "

#    ("eval" body line 1)

#    invoked from within

# "eval $file"

#    ("foreach" body line 2)

#    invoked from within

# "foreach file $design_files {

#    eval $file

#  }"

#    ("eval" body line 13)

#    invoked from within

# "com"

I then found in Quartus II software 11.1 release notes (2011!) the following:

Simulating an Avalon MM master or slave BFM with msim_setup.tcl in ModelSim leads to errors

Description

If you attempt to simulate an Altera Avalon Memory-Mapped (MM) Master bus functional model (BFM), or an Altera Avalon MM Slave BFM using the generated Model-

Sim script msim_setup.tcl, ModelSim may issue error messages similar to the following:

Error: test_module.sv(2): Could not find the package (avalon_mm_pkg).

Error: (vsim-8386) ./test_module.sv(75): An enum variable may only be assigned the same enum typed variable or one of its values.

Workaround

Perform one to the following steps:

• At a command prompt, run “ip-make-simscript --spd=<generated_spd_file>

--compile-to-work” to regenerate the ModelSim simulation script that compiles

all component into a single work library, or

• Manually modify the msim_setup.tcl script to compile all files into a single work

library.

i tried to follow this, but don't have a clue what i am doing....

 “ip-make-simscript --spd=avalon_mm_pkg --compile-to-work”

# invalid command name "“ip-make-simscript"

 do ip-make-simscript --spd=avalon_mm_pkg --compile-to-work

# Cannot open macro file: ip-make-simscript

 

 

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