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Altera_Forum
Honored Contributor I
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using the hps phy via loanios from fpga (de10-nano-soc)

Hi everybody, 

 

I'm currently struggling to access the hps ethernet phy from fpga. I followed this (http://www.alterawiki.com/wiki/file:hpsio_demo.qar) example.  

I need to configure the phy (http://ww1.microchip.com/downloads/en/devicedoc/00002117f.pdf) using the mdio and mdc pins. However, when i mux the loanio  

pins in qsys: 

https://alteraforum.com/forum/attachment.php?attachmentid=14445&stc=1  

And try to assign my 50MHz clock to them from my toplevel: 

https://alteraforum.com/forum/attachment.php?attachmentid=14446&stc=1  

When probing the phy pins using an oscilloscope, I do not see my 50Mhz clock as routed  

in the toplevel. On the contrary I see regular mdio accesses from somewhere. 

 

What am I doing wrong? 

 

EDIT: SOLVED! you need to generate preloader using bsp-editor, then use alt-boot-disk-util to flash to sd card
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