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Where a bidirectional, differential IO is chosen, the "oe" input doesn't like being forced to '0', it will give an error saying pins aren't driven. If '1' it's ok. If the oe is made '1' even momentarily all is well and the design fits.
I've just removed a load of logic leaving this "oe" low and so failed synthesis. It took ages to determine why.
This feels like a bug. I would have hoped the sysnthsis would simply have resolved the issue by removing unused logic, but doesn't.
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Hello,
Can I know more details about your design and what is the exact error that you receive? Which device are you using and what is its OPN?
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Many thanks for the reply. It took me a while to research what OPN might be.
I'm not sure how relevant this is but it's a 5CEBA2F23C8
And I'm using Quartus Prime Version 18.1.0 Lite Edition
I would have moved onto 20.1 but it is very broken when it comes to NIOS.
I thought I would reinstate the original conditions as far as I could and recompile to clarify the error. I don't know what has happened but the design synthesises and fits without error. If it recurs I will post here with some more details.
HTH
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