- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Dear Support and Expert
I am learning PCIe, DMA and DDR. AN829 is a good example for A10 platform. I have made minor modification to get the project compiled and execute simulation in Quartus 21.3 environment, but the simulation will stop and shown the following message. it is really hard for a beginner to figure out the problem,
INFO: 132429 ns RP LTSSM State: DETECT.ACTIVE
# INFO: 133469 ns RP LTSSM State: POLLING.ACTIVE
# INFO: 146333 ns RP LTSSM State: DETECT.QUIET
# INFO: 146669 ns RP LTSSM State: DETECT.ACTIVE
# INFO: 147709 ns RP LTSSM State: POLLING.ACTIVE
# INFO: 160573 ns RP LTSSM State: DETECT.QUIET
# INFO: 160909 ns RP LTSSM State: DETECT.ACTIVE
# INFO: 161949 ns RP LTSSM State: POLLING.ACTIVE
# INFO: 174813 ns RP LTSSM State: DETECT.QUIET
# INFO: 175149 ns RP LTSSM State: DETECT.ACTIVE
# FATAL: 175149 ns LTSSM does not change from DETECT.QUIET
# FAILURE: Simulation stopped due to Fatal error!
# FAILURE: Simulation stopped due to error!
# ** Note: $stop : ../../../ip/top_hw_tb/DUT_pcie_tb_ip/altera_pcie_a10_tbed_191/sim/altpcietb_ltssm_mon.v(161)
# Time: 175149 ns Iteration: 1 Instance: /top_hw_tb/dut_pcie_tb/dut_pcie_tb/g_bfm/p_dut_ep/altpcietb_bfm_top_rp/ltssm_mon
# Break in Function ebfm_log_stop_sim at ../../../ip/top_hw_tb/DUT_pcie_tb_ip/altera_pcie_a10_tbed_191/sim/altpcietb_ltssm_mon.v line 161
=================== function
function ebfm_log_stop_sim;
input success;
integer success;
begin
if (success == 1)
begin
$display("SUCCESS: Simulation stopped due to successful completion!");
$display("Simulation passed");
`ifdef VCS
$finish;
`else
$stop ;
`endif
end
else
begin
$display("FAILURE: Simulation stopped due to error!");
`ifdef VCS
$finish;
`else
$stop ; //********************** this is the line 161
`endif
end
ebfm_log_stop_sim = 1'b0 ;
end
endfunction
I don't know is it possible to make this AN829 simulation work on A10 GX environment. if it worked, it would provide a very powerful learn tools for the beginner.
appreciate your input and suggestion.
Thank you,
David
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi David,
Please accept my apologies for late reply.
I was able to run a full compilation based on the .qar provided by you without any error in Quartus v21.3.
Could you please try to run again ? or maybe in another device/PC...
If the issue still happens, you may refer to Intel FTA PCIe document
https://community.intel.com/t5/FPGA-Wiki/FTA-PCI-express/ta-p/735993
It mentions steps to debug the LTSSM.
Hope this is helpful to you.
Regards,
Wincent_Intel
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi David,
I am assigned to this case.
Please allow me to have sometime look at the .qar file.
Get back to you soon as possible
Regards,
Wincent_Intel
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi David,
Please accept my apologies for late reply.
I was able to run a full compilation based on the .qar provided by you without any error in Quartus v21.3.
Could you please try to run again ? or maybe in another device/PC...
If the issue still happens, you may refer to Intel FTA PCIe document
https://community.intel.com/t5/FPGA-Wiki/FTA-PCI-express/ta-p/735993
It mentions steps to debug the LTSSM.
Hope this is helpful to you.
Regards,
Wincent_Intel
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Wchiah,
I don't have problem to compile use Quartus, I have problem when run the simulation.
by the way, is there other example for Arria 10 develop kit that demo PCIe and DMA.
Thank you,
David
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Wchiah
An829 has a DDR interface, that is very attractive to serve as an example. for some reason it is not very straight forward to a newbie.
I use the platform designer to create a Pcie interface from scratch and generate simulation. seems this time the simulation can run through.
I put it in a new thread.
how to Integrate PCIe DMA to replace USB3 interface - Intel Communities
hope you will be assigned to this new thread and give me some suggestion.
Thank you very much,
David
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi David,
Thank you very much, with that said I will close this forum and leave the rest to the community user for follow-up questions.
If you feel your support experience was less than a 9 or 10,
please allow me to correct it before closing or please let me know the cause so that I may improve your future support experience.
See you in next case if i were been assign to, wish you have a nice day ahead
Regards,
Wincent_Intel
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Wchiah,
Your support is great and 100% satisfied. the difficulty was the FPGA design is so complicate to a newbie, sometimes they don't even know what kind of support they need. with the valuable support from you, I feel getting close to what I really want to ask for.
Thank you very much,
David
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page