I am processing NTSC video in a Cyclone III FPGA, with input coming from an ADV7180 NTSC decoder, and output going back out to an ADV7171 NTSC encoder. In both cases I am using embedded syncs.
The Altera CVO core is outputting the processed data from my VIP suite with the vertical sync misaligned, or at least it seems so. The image is down from the top of the monitor, with vertical blanking information showing for the top 20-30 rows of the screen. I am looking for the proper way to adjust the vertical offset using the CVO core. I've spent an entire day, and have had little luck adjusting things at runtime using the control port.
As a comparison, I built a design where I simply stream the NTSC input to the NTSC output, bypassing all of my SOPC logic. I.e. the output of the ADV7180 is wired to the input of the ADV7171. When I do this, the output to the monitor right, and is the same as if I were to connect the NTSC source directly to the analog monitor.
Any advice is appreciated. I just need to move the image UP on the monitor when using embedded sync mode.
Thanks!
Jim Morris
