Avalon mm user logic with EMIF IP read data issue

[srinivasan]

Hi,
I have implemented EMIF IP with Avalon mm user interface code in arria 10 SoC development kit.

I am trying to write 20 counterdata (576 bits)but while reading I am getting junk data with respect to readvalid.

I am having doubt in assigning the burstcount and byteenable.

Can anyone give the solution for the error??

[yoichiK_intel]

Hi

Can you give a more information on this ?

I assume that DDR4 interface is 72 bit and Avalon mm interface is 72x8 = 576bit interface.

You tried to write with 20 burst length and following that you tried to read the same address from read.

you can check the avalon burst length protocol with the avalon interface spec.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf