I am using Stratix 10 SoC dev kit & I am using the transceivers @ 10Gbps. For some testing purpose I need to enable reverse serial loopback mode.
I gone through the Stratix 10 Transceiver user guide & understood which PMA registers to be modified through AV-MM interface.
My question is, whether the read modified write is sufficient to enable the reverse serial loopback mode or after updating the PMA registers, whether I need to apply the reset sequencing once again?
[I am not changing any other channel related or PLL related configurations, but Just enabling the loopback mode to reverse serial loopback mode, I tested this feature using transceiver toolkit, but now I want to handle manually as in my some test application I can not use transceiver toolkit. So, I have written a AV-MM based wrapper to update the register. ]
Based on attached user guide guideline, I don't think it's hard requirement to perform reset after loopback testing.
However, if you observe unexpected high BER after loopback testing then it may well worth to perform channel reset and re-calibration again.
HI @Deshi_Intel ,
Thanks for your suggestions.
My use case is like, on Power as soon as first time calibration is done, I will put the transceivers in reverse serial loopback mode by writing (read modified write) to PMA registers. After that I will not go for any loopback mode off configuration.
Noted and thanks for your explanation.
By right, you shouldn't need to perform additional reset again but pls double check in your hardware system to be safe.