- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Had anyone else noticed the discrepancy between the VIP reference design status register (offset 2) for Clock Video Input and the VIP documentation?
The reference design code shows 10 bits with the overflow setter at bit 8 and overflow assert on bit 9. The documentation says 10 bits but the overflow setter and assert both share bit 9. Lower bits get offset, so I'm not sure of the signals I can expect from them.Link Copied
3 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
It seems like that.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The VIP documentation is correct.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you. This matches my own observations of the values.
Just for the archives, this is also confirmed by Altera themselves. The Clocked Video Input class in the VIP Reference Design is out-of-date. Trust the descriptions in the VIP User Guide.
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page