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PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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Configuration of FIFO IP depth using constant

Aiswarya
初学者
939 次查看

Hi,

I want to know whether it is possible to configure the depth and address width of a FIFO IP using a generic parameter during instantiation of the FIFO IP?

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MathiasB
新分销商 I
926 次查看

Hi,

Can you be more specific? I do not see why it would not be possible.

What IP do you use? Intel's? Custom?

The only problem I can imagine is Platform Designer (Qsys) getting in your way... Are you using it? If not how are you instantiating the IP?

 

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JohnT_Intel
员工
918 次查看

Hi,


Are you using it with IP generator or Platform Designer?


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Aiswarya
初学者
912 次查看

Aiswarya_0-1640664452975.png

I am generating a FIFO IP using IP catalog window in Quartus.  There I can configure the depth and address width of the FIFO.

But what I wanted is to generate a FIFO in such a way that the depth/ address width can be passed to the FIFO IP using a generic parameter while instantiating this FIFO IP component in a wrapper file.

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JohnT_Intel
员工
910 次查看

Hi,


You may refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_fifo.pdf on how to change the parameter or instantiate using RTL code.


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