FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6022 Discussions

Configuration of FIFO IP depth using constant

Aiswarya
Beginner
135 Views

Hi,

I want to know whether it is possible to configure the depth and address width of a FIFO IP using a generic parameter during instantiation of the FIFO IP?

0 Kudos
4 Replies
MathiasB
New Contributor I
122 Views

Hi,

Can you be more specific? I do not see why it would not be possible.

What IP do you use? Intel's? Custom?

The only problem I can imagine is Platform Designer (Qsys) getting in your way... Are you using it? If not how are you instantiating the IP?

 

JohnT_Intel
Employee
114 Views

Hi,


Are you using it with IP generator or Platform Designer?


Aiswarya
Beginner
108 Views

Aiswarya_0-1640664452975.png

I am generating a FIFO IP using IP catalog window in Quartus.  There I can configure the depth and address width of the FIFO.

But what I wanted is to generate a FIFO in such a way that the depth/ address width can be passed to the FIFO IP using a generic parameter while instantiating this FIFO IP component in a wrapper file.

JohnT_Intel
Employee
106 Views

Hi,


You may refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_fifo.pdf on how to change the parameter or instantiate using RTL code.


Reply