Can you be more specific? I do not see why it would not be possible.
What IP do you use? Intel's? Custom?
The only problem I can imagine is Platform Designer (Qsys) getting in your way... Are you using it? If not how are you instantiating the IP?
I am generating a FIFO IP using IP catalog window in Quartus. There I can configure the depth and address width of the FIFO.
But what I wanted is to generate a FIFO in such a way that the depth/ address width can be passed to the FIFO IP using a generic parameter while instantiating this FIFO IP component in a wrapper file.