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Altera_Forum
Honored Contributor I
855 Views

DSP Builder Advanced: valid signal

Hello. 

I create some subsystem in DSP builder advanced blockset that consist of one ModelPrim subsystem. I have only _one_ channel. Than I want to integrate this subsystem in my existed quartus project. My question: how I should control valid and channel signal? 

Thank you.
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Altera_Forum
Honored Contributor I
25 Views

 

--- Quote Start ---  

Hello. 

I create some subsystem in DSP builder advanced blockset that consist of one ModelPrim subsystem. I have only _one_ channel. Than I want to integrate this subsystem in my existed quartus project. My question: how I should control valid and channel signal? 

Thank you. 

--- Quote End ---  

 

 

You run valid_in according to expected rate as entered in sampling rate relative to system clock e.g. if your sampling rate is 1/3 of sys clk then set valid_in high once every 3 clocks. 

 

As to channel_in: surprisingly it is not used internally even when channels are multiple. It does not drive anything as far as latest DSPBuilder filter modules. If in doubt set it to 0. But channel_out is driven.
Altera_Forum
Honored Contributor I
25 Views

Thank you. So valid_in is needed for my own purpose only (for example for storing previous data sample)? This signal doesn't affect standard ModelPrim blocks? 

I build simple module that calculate atan2 function put 0 constant bit to 'valid' port of dsb builder subsystem at my top entity - nothing changes, atan2 calculate perfectly.