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Fatal Error happened during FFT block compilation

Altera_Forum
Honored Contributor II
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I am using Quartus II 8.0 Web Edition. Using MegaWizard Plug-In Manager I had generated fft.vhd file. The vhd file can be compile successfully. However, when I create new project and then create block diagram/ schematic file with fft symbol added in it, compilation was unsuccessful. Before I compile, I got include the fft qip file in the project. I received a pop up message as shown below: 

 

*** Fatal Error : Access Violation at 0X078BD474 

Module : quartus_map.exe 

0X1D474 : amerge_mini_merge + 0X1A0D4 (atm_merge) 

End Trace 

 

I just wanted to test the functionality of this fft block. Has anyone encounter this problem before? Anyone has any idea why this problem can happen? I already follow the instructions written in the pdf user guide.
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Altera_Forum
Honored Contributor II
456 Views

 

--- Quote Start ---  

I am using Quartus II 8.0 Web Edition. Using MegaWizard Plug-In Manager I had generated fft.vhd file. The vhd file can be compile successfully. However, when I create new project and then create block diagram/ schematic file with fft symbol added in it, compilation was unsuccessful. Before I compile, I got include the fft qip file in the project. I received a pop up message as shown below: 

 

*** Fatal Error : Access Violation at 0X078BD474 

Module : quartus_map.exe 

0X1D474 : amerge_mini_merge + 0X1A0D4 (atm_merge) 

End Trace 

 

I just wanted to test the functionality of this fft block. Has anyone encounter this problem before? Anyone has any idea why this problem can happen? I already follow the instructions written in the pdf user guide. 

--- Quote End ---  

 

 

Try to generate the fft block again in your new project directory. Sometimes this helps. 

 

Kind regards 

 

GPK
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Altera_Forum
Honored Contributor II
456 Views

Hi, thanks Pletz for helping me. I had tried to generate to fft block again but still the same result. Somehow I just can't seem to be able to use the block. Maybe the way I generate it is wrong, cause when I tried it in another computer the same error message appear. Let me explain my steps again, see if I missed anything that could lead me to the error.  

 

1. First, I create a new project directory at c:\altera\projects\fft_project 

 

2. Then, I generate fft megafunction under a project with the name fft.qpf,  

so the vhd code generated is located at  

c:\altera\projects\fft_project\fft.vhd along with other files such as fft.bsf,  

fft.qip, fft_tb.v, fft_tb.vhd and many others. 

 

3. After that, I create another project with the name fftwork.qpf. The  

location of the project is c:\altera\projects\fft_project\fftwork.qpf 

Under that project, I create a block diagram file (bdf) named fftwork.bdf. 

Inside that bdf file, there is the fft block. fft.qip is added to the project  

using settings (assignments). I get the same error message result  

regardless if I connect the fft block pins or not. The compilation stops at  

23% everytime. 

 

Is this a wrong way to use IP megafunction? And also, I tried generating Reed-Solomon decoder with the same method and I still face the same error message. I am running out of idea anymore to solve this problem. Do you have any other suggestions?
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Altera_Forum
Honored Contributor II
456 Views

 

--- Quote Start ---  

Hi, thanks Pletz for helping me. I had tried to generate to fft block again but still the same result. Somehow I just can't seem to be able to use the block. Maybe the way I generate it is wrong, cause when I tried it in another computer the same error message appear. Let me explain my steps again, see if I missed anything that could lead me to the error.  

 

1. First, I create a new project directory at c:\altera\projects\fft_project 

 

2. Then, I generate fft megafunction under a project with the name fft.qpf,  

so the vhd code generated is located at  

c:\altera\projects\fft_project\fft.vhd along with other files such as fft.bsf,  

fft.qip, fft_tb.v, fft_tb.vhd and many others. 

 

3. After that, I create another project with the name fftwork.qpf. The  

location of the project is c:\altera\projects\fft_project\fftwork.qpf 

Under that project, I create a block diagram file (bdf) named fftwork.bdf. 

Inside that bdf file, there is the fft block. fft.qip is added to the project  

using settings (assignments). I get the same error message result  

regardless if I connect the fft block pins or not. The compilation stops at  

23% everytime. 

 

Is this a wrong way to use IP megafunction? And also, I tried generating Reed-Solomon decoder with the same method and I still face the same error message. I am running out of idea anymore to solve this problem. Do you have any other suggestions? 

--- Quote End ---  

 

 

Hi , 

 

you should install at least the service pack for the 8.0 version. If this does not help you should try the 8.1 version of the Quartus Web edition. BTW you don't need a licence anymore for the 8.1 version. In the meantime I will try to reproduce your problem on my PC. What is your FPGA target family? 

 

GPK
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Altera_Forum
Honored Contributor II
456 Views

 

--- Quote Start ---  

Hi , 

 

you should install at least the service pack for the 8.0 version. If this does not help you should try the 8.1 version of the Quartus Web edition. BTW you don't need a licence anymore for the 8.1 version. In the meantime I will try to reproduce your problem on my PC. What is your FPGA target family? 

 

GPK 

--- Quote End ---  

 

 

Hi, 

 

I run a test project with Quartus 8.1. I generated the FFT directly in the toplevel directory and used Verilog as description language. I works fine. Have look into may project. I had to delete the db folder in order to reduce the size of the zip file. Run the compilation again.
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Altera_Forum
Honored Contributor II
456 Views

Hi, 

It is kind of embarrassing but I had to admit that it was my mistake. I had taken a look at Pletz’s project and his project can be compiled successfully. I am not sure what cause the fatal error but what I am sure is that fft block had to be connected, if ‘all’ the pins are left unconnected, then fatal error will appear. It is my mistake for not connecting the pins of the fft block. But the reason why I did that is because initially when I connect the fft block, I receive the fatal error. So in order to check the error, I compile each block and come to the conclusion that the megafunction blocks are what caused the problem, my other blocks are non megafunction. But now, when I re-do my initial work (connecting fft block with others), there isn’t fatal error anymore and I have no idea why. So, thanks again Pletz, I no longer face the fatal error problem.
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Altera_Forum
Honored Contributor II
456 Views

 

--- Quote Start ---  

Hi, 

It is kind of embarrassing but I had to admit that it was my mistake. I had taken a look at Pletz’s project and his project can be compiled successfully. I am not sure what cause the fatal error but what I am sure is that fft block had to be connected, if ‘all’ the pins are left unconnected, then fatal error will appear. It is my mistake for not connecting the pins of the fft block. But the reason why I did that is because initially when I connect the fft block, I receive the fatal error. So in order to check the error, I compile each block and come to the conclusion that the megafunction blocks are what caused the problem, my other blocks are non megafunction. But now, when I re-do my initial work (connecting fft block with others), there isn’t fatal error anymore and I have no idea why. So, thanks again Pletz, I no longer face the fatal error problem.  

--- Quote End ---  

 

 

Hi, 

 

you shouldn't be so hard to you, such things happens all the time. Hopefully I could help you. 

 

Happy new year  

 

Kind regards 

 

GPK
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