FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
6673 Discussions

HOW to convert serial RGB to parallel .i am using the ip\LCD_Panel_TPO_TD043MTEA1

Altera_Forum
Honored Contributor II
1,664 Views

HOW to convert serial RGB to parallel ,i want to convert the cyclone III neek MP3 example to my DE2-70 board ,but i found that the IP‘s RGB output was not the parallel,how to convert it or modify the IP?Hope someone help me...TQ..

0 Kudos
7 Replies
Altera_Forum
Honored Contributor II
939 Views

you can write an external module to do this. 

 

But I recommend you replacing the video_sync_generator with the clocked_video_output component whose data out can be configured as parallel. 

 

clocked_video_output use a conduit end port for Video clock input, in sopc builder it's clock can be the same as sgdma, and it has a data fifo within it, so you don't need a dual clock fifo on the streaming line.
0 Kudos
Altera_Forum
Honored Contributor II
939 Views

thank you,but i did not use the video_sync_generator ,just the ip of MP3 example,named lcd_panel_tpo_td043mtea1 .It drives the LTM—TRBD of DE2-70 board.but it use for the cyclone III DEVICE ,i want to modify it,but failed..

0 Kudos
Altera_Forum
Honored Contributor II
939 Views

oh, sorry~ 

I really have no idea with lcd_panel_tpo_td043mtea1 if you have to work with it. 

but the clocked_video_output is pretty good for driving vga or lcds with clocked pixel scanning interface, so if you are using such a lcd, you may try using it.
0 Kudos
Altera_Forum
Honored Contributor II
939 Views

thanks for your reply,but i just used the university program ip or a hard module timing controller,so i hope you can give me an example project of using the *clocked_video_output*,thank you....friend...

0 Kudos
Altera_Forum
Honored Contributor II
939 Views

There is an simple example about how to use clocked video output and sgdma, hw and sw. 

It's actually a ".7z" file, rename the ".zip" back to "7z".
0 Kudos
Altera_Forum
Honored Contributor II
939 Views

I really appreciate your helping me.how can I contact with if i get a problem..I really want to be a friends of you...so.what board are you using now? cyclone III family device?I am using the cyclone II device...

0 Kudos
Altera_Forum
Honored Contributor II
939 Views

I have forgotten that, the project is on DE0 board(EP3C16F484C6). 

you may modify pin connects, mega functions' device family... 

May be you'd better re-create a project.
0 Kudos
Reply