Here the transreciver rules are limited to pma no pcs. is there any limitation or need to use any other IP together to make it as pipe interface.
Also does this device supports custom pcie controller to use with native phy.
As I understand it, you have some inquiries related to the XCVR in the S10 devices. Would you mind to further elaborate on the specific Quartus version that you are using? Also, it would be great if you could share some screenshots on the issue observation to ensure we are on the same page.
Thank you very much.
Thanks for the response.
I am using Quartus version 19.3.
Before I used Stratix10 GX device which was L-tile H-tile, so there the phy transceiver has option of transceiver rule as gen3 pipe interface. which is standard as pcs ais included for easy integration.
Now I changed the device (as per requirement) to stratix10 DX device which is E-tile P-tile. So here I can see the transceiver rule is limited to PMA i.e no pcs. So how can we integrate this phy with custom controller as standered is pipe interface for PCIe.
screenshot attached for both device.
Thanks for your update. As I understand it, you have some inquiries related to the E-Tile Native PHY in the S10DX devices as compared to GX devices. For your information, in the S10DX devices, it consists of P-tile and E-tile only. For the E-tile Native PHY, it only supports PCS-direct or PMA only mode. There is no standard PCS like L/H-tile available. In other words, you would not be able to direct migrate from L/H-Tile Native PHY to E-Tile Native PHY. As for the P-tile, it is used for PCIe or UPI application only. For the PCIe application, you would need to use the Hard IP to leverage the P-tile XVCR.
Please let me know if there is any concern. Thank you.
So in this case if I am using Stratix10 DX device 1SD280PT2F55E1VGS1 which is a P-tile but for transceiver it only shows E-tile transceiver. I cannot use custom controller. I need to use Hard PCIe IP only.