FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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How can i make the Marvel 88E1111 PHY chip work properly?

Honored Contributor II


I am using the Cyclone IV GX150 FPGA Development kits to accomplish coommunication between PC and FPGA by TSE mac IP core without nios.I set the mac ip with 10,100/1000 Mb mac using RGMII interface,and config the registers under the guide of ug,but it can't work on the board.So i run the board test system to observe the simple socket server log.It seems need to initial the phy at first.Then i refer to this log to initial phy chip registers reg1,reg20 and reg27.But it still can't make the phy chip work properly.So,could anyone give me some recommendations?I am not sure whether have i understand the bts log properly.So i have attached the bts log below.thank you!
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Honored Contributor II

Could anyone help me?Thanks!