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How to change cxl example design to four ddr4 channels?

Jzone315
Beginner
‎09-06-2024 03:37 AM
483 Views

We are trying to make a cxl type3 design with 4 ddr4 channels on DK-DEV-AGI027RBES board，based on the example design with 2 channels，we had updated the HDM size and change the ip to 4 slices，all is good but when we test it on DK-DEV-AGI027RBES，the server can not boot up，crashed when os started. 

The example design with 2 channels worked fine, we had also verified the HDM size changes on 2 channel example design, also worked. 

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WZ2
Employee
‎10-13-2024 06:25 PM
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Hi Jinjun,

About your case, i see the IPS case already assigned to CXL expert and they are doing simulation about your issue. Since the approach to handling issues is the same for both IPS and Forum, and IPS has a higher priority than Forum, we will respond through IPS. Thank you for your understanding.

Best regards,

WZ


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