FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6483 Discussions

How to realize Partial Reconfiguration via PCIe on original board.

go_jeff_huang
Beginner
1,165 Views

Hi

 

I would like to do Partial Reconfiguration via PCIe gen3 x8 on our original board with Arria10 GX.

I know I can do Partial Reconfiguration on Arria10 GX FPGA development kit.

Also I know Intel provide some document and design about this.

However in case of original board which does not have MAX device, I could not any reference design and reference documents.

Could someone let me know some documents and reference design about Partial Reconfiguration?

 

Best Reagrds.

0 Kudos
1 Reply
JohnT_Intel
Employee
442 Views

Hi,

 

You may refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-pr.pdf (Partial Reconfiguration for Arria 10) and https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_cvp_prop.pdf ​(Arria 10 CvP Initialization and Partial Reconfiguration over PCI Express User Guide)

0 Kudos
Reply