I have an FIFO and an EMIF in my q17 design, and need a way for the data to automatically move from the FIFO to the memory whenever data appears in the FIFO. I could write a state machine to do this, but if there's a cleaver way to connect things just using the fabric that would be fabulous.
I am sorry to said that we do not have a library that auto translate the FIFO into Avalon port of EMIF.
I will suggest you to write a logic component that converting the FIFO port to Avalon standard, then you can connect it to EMIF using Qsys interconnect.
Hope this helps