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Jesd204_rx_int assertion trouble shoot

dsun01
New Contributor III
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Dear Support/Expert,

I have a module that instantiated 4X 4 lane phy modules and 2X 8 lane base modules. The i0_Jesd204B_mc_rx is one of the 8lane base module. After the sysref and dev_sync_n. The jesd204_rx_pcs_data show up “bcbcbc......”. Then Jesd204_rx_int asserted high.

 

The description of jesd204_rx_int is “Interrupt pin for the JESD204B IP core. Interrupt is asserted when any error is detected. Configure the rx_err_enable register to set the type of error that can trigger an interrupt.”

the jesd204_rx_int is a signal come from an encrypted module. I don't know how to trouble shoot this problem. 

Appreciate your help.

 

David 

 

jesd204_rx_int_asserted.png

 

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dsun01
New Contributor III
127 Views

this document may provide a better resolution image of the waveform

Thank you

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