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MDIO access in TSE

Altera_Forum
Honored Contributor II
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Hi! 

 

We are using the TSE MAC configured in Small MAC mode, using the MII interface. Some questions have arised on the timing and how to access the PHY. 

 

1. Write the PHY address(es). Straightforward. 

 

2. A MDIO read cycle is initiated when reading one of MDIO registers. According to the TSE documentation, we think the MDIO transaction is triggered by the register read itself. Is this correctly understood? If so, the application must "trigger" the actual MDIO read by a dummy register read, and then read the register again after a MDIO frame time for fetching the actual result. Note that this second register read access will also trigger a "dummy" MDIO access, but the result from this can be ignored. 

 

3. Similar mechanism when writing to a MDIO register. But this case is simpler since one write access leads to one MDIO transaction. 

 

Another way would be to have an interrupt mechanism for this (like in the ColdFire CPU). When reading, the MDIO finishes its operation and then sends an interrupt to the application which then fetches the data. But as far as I have understood, this isn't supported in the TSE MAC.  

 

Guess the {initiate_read-wait_frametime-actual_read} mechanism fills the need, but it would be good to get it confirmed! 

 

All leads and tips would be appreciated! 

 

/A
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Altera_Forum
Honored Contributor II
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We discussed this today, and perhaps the answer is that the waitrequest in the Avalon interface handles the waitstate insertion when accessing the registers?

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