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Need better understanding of HPC/DDR usage

Altera_Forum
Honored Contributor II
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I am using the native interface of the HPC for a DDR external memory.  

The HPC is set to half rate and I set the local_size to a hard coded 1 for a burst length of four.  

 

It is unclear to me about the use of the local interface pins.  

When writing a burst of data, I assume that I apply the address on the local_address pins, and assert local_write_req. When local_wdata_req asserts, I apply my data. What I don't get is this: When local_wdata_req stays asserted, when do I update the local_address? Do I update it every clock cycle are every 4 clock cycles? 

 

Thanks in advance for your consideration.
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