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New Video IP example design for 3C120 board is available

Altera_Forum
Honored Contributor II
1,049 Views

I have extended the current Cyclone III example design by introducing some of the new IP features added in Quartus 9.1. Specifically I have added two frame readers and two control synchronisers to provide an on-screen logo image from a ROM, and a graphics screen from DDR memory. The control synchronizers are used to perform smooth centered-zoom and layer switching functions. The .zip file includes an "Extended example design.ppt" presentation which also explains the changes.  

 

I recommend that anyone wanting to try this out should get the standard example design working first. Then, the only "gotcha" is to do the linker edits so that the NIOS uses the on-chip RAM instead of the frame reader's DDR - be sure to follow the instructions in the README.txt. 

 

Jon.
0 Kudos
13 Replies
Altera_Forum
Honored Contributor II
101 Views

Thanks for posting this. Seems like you got a bunch of different things working all in one design. 

 

What else do you need with the Cyclone 3c120 Dev board to get this to work?
Altera_Forum
Honored Contributor II
101 Views

Hi Vipjon! 

Thanks for sharing your effort. I appreciate this as i tried to implement OSD using Video Example design of Altera for EP3C120 as reference but failed in my attempt. just started downloading your zip file.
Altera_Forum
Honored Contributor II
101 Views

I haven't changed the setup of the development board at all, it's the same as for the documented example design. I've just enhanced the on-FPGA VIP to introduce the extra features.

Altera_Forum
Honored Contributor II
101 Views

There is no H264 encoding in my design - this is purely manipulation of raw video streams.

Altera_Forum
Honored Contributor II
101 Views

hi 

I have a same problem can any one of you please help me to design video precessing image 

my work is to aqcuirit signal form tv decoder( altera board cyclone II) and stock this signal into SDRAM memory and finally display it to page web by use web server, I have some examples of web server and SOPC design for tv decoder  

if any one can give me exampl to SOPC design or some ideas to begin my prject?
Altera_Forum
Honored Contributor II
101 Views

In understanding what to do, you need to make a call regarding the format in which your video needs to be streamed back to your web browser (client). Once you know your options, in this respect, then you can start figuring out what to do on the server side of things. 

 

Wikipedia has some decent information: http://en.wikipedia.org/wiki/streaming_media 

 

Best of luck! 

 

-slacker
Altera_Forum
Honored Contributor II
101 Views

 

--- Quote Start ---  

I have extended the current Cyclone III example design by introducing some of the new IP features added in Quartus 9.1. Specifically I have added two frame readers and two control synchronisers to provide an on-screen logo image from a ROM, and a graphics screen from DDR memory. The control synchronizers are used to perform smooth centered-zoom and layer switching functions. The .zip file includes an "Extended example design.ppt" presentation which also explains the changes.  

 

I recommend that anyone wanting to try this out should get the standard example design working first. Then, the only "gotcha" is to do the linker edits so that the NIOS uses the on-chip RAM instead of the frame reader's DDR - be sure to follow the instructions in the README.txt. 

 

Jon. 

--- Quote End ---  

 

Hi i get 3 errors when I am tryin to run the code in the zip file in quartus..
Altera_Forum
Honored Contributor II
101 Views

you should include the version of Quartus you're using and paste the errors

Altera_Forum
Honored Contributor II
101 Views

Design is not opening in Quartus ver 9 giving error that it contains one or more character like /*&..so what to do now.I have to run this design on board..Experts please tell me the solution

Altera_Forum
Honored Contributor II
101 Views

Hi all, 

 

I am a fresher in ALTERA.I also get errors when i try to compile the design in the EP3C120 board .I am using the one from Bitec
Altera_Forum
Honored Contributor II
101 Views

 

--- Quote Start ---  

I have extended the current Cyclone III example design by introducing some of the new IP features added in Quartus 9.1. Specifically I have added two frame readers and two control synchronisers to provide an on-screen logo image from a ROM, and a graphics screen from DDR memory. The control synchronizers are used to perform smooth centered-zoom and layer switching functions. The .zip file includes an "Extended example design.ppt" presentation which also explains the changes.  

 

I recommend that anyone wanting to try this out should get the standard example design working first. Then, the only "gotcha" is to do the linker edits so that the NIOS uses the on-chip RAM instead of the frame reader's DDR - be sure to follow the instructions in the README.txt. 

 

Jon. 

--- Quote End ---  

 

 

Hi  

can u post please the original vip_example_design_3c120 design for the board 

sneha
Altera_Forum
Honored Contributor II
101 Views

Can any1 send me link for standard example design of vip_example_design_3c120

Altera_Forum
Honored Contributor II
101 Views

 

--- Quote Start ---  

I have extended the current Cyclone III example design by introducing some of the new IP features added in Quartus 9.1. Specifically I have added two frame readers and two control synchronisers to provide an on-screen logo image from a ROM, and a graphics screen from DDR memory. The control synchronizers are used to perform smooth centered-zoom and layer switching functions. The .zip file includes an "Extended example design.ppt" presentation which also explains the changes.  

 

I recommend that anyone wanting to try this out should get the standard example design working first. Then, the only "gotcha" is to do the linker edits so that the NIOS uses the on-chip RAM instead of the frame reader's DDR - be sure to follow the instructions in the README.txt. 

 

Jon. 

--- Quote End ---  

 

 

Hi Vipjon, 

 

In this example design, I could not understand event queue header file's function.What job it does, could you please explain me?
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