HiI'm developing a project with altera FPGA cyclone IV Development Board connected to a PC via PCIe bus. I'm trying to generate a PC Interrupt when a push button of the dev board is pressed. I use Quartus 2 Version 12.1 and Qsys tool , the top entity is written in verilog. In Qsys I have connected the PCIe IP with an onchip_memory and a PIO avalon interface, the bar are configurated in this way: bar 0 (32 bit not prefetchable) 0x00000000 0x00003fff onchip_memory || 0x00004000 0x00007fff cra register bar 1 (32 bit not prefetchable) 0x00000000 0x00003fff PIO the interrupt signal of the PIO module is connected with the RXmIrq0 of the PCIe The PCIE ip compiler is configurated :
You may needs configure the pcie core as Requester/Completer instead of Requester-only.ostIn Completer-only mode, the IP Compiler for PCI Express can receive requests, but cannot initiate upstream requests, this will cause the MSI interrupt not reach the host side. For more info about MSI Interrupts Handling, refer to http://www.alterawiki.com/wiki/handling_pcie_interrupts
Try configure the PCIe core to requester/completer instead on completer-only.Completer-Only mode only can receive requests, but cannot initiate upstream requests.