PTILE + PIO Example design

[Adithiya_R]

For  the Ptile+PIO example design, with Intel BFM --- in endpoint config,  if we replace the PIO instance with CUSTOM_LOGIC, we can perform 

1. BAR0 ( MemWr, MemRd)  --- ( BFM, PTILE_EP---> Custom Logic)
2. Similarly, we can also initiate MemWr, MemRd ( Custom Logic  ---> PTILE_EP ---> BFMs Shared Memory) 
3. But in the current BFM, is there a provision to exercise Interrupt ( legacy, MSI/MSI-X)?

[Wincent_Altera]

Hi Adithiya,

I just try to understand what you going to do before we actually go into your question.

1. BAR0 ( MemWr, MemRd) --- ( BFM, PTILE_EP---> Custom Logic)
2. Similarly, we can also initiate MemWr, MemRd ( Custom Logic ---> PTILE_EP ---> BFMs Shared Memory) 

>> Okay, if I understand correctly that will be the reason you using custom logic instead of build in Intel BFM right ?

1. But in the current BFM, is there a provision to exercise Interrupt ( legacy, MSI/MSI-X)?

>> I not sure how you perform your custom logic , but theoretically you can enable these capabilities in your custom BFM instance

>> BUT ensure your custom logic generates the correct signals or memory writes as per the PCIe specification.

Regards,

Wincent_Altera