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Quartus 18.1 FFT IP modelsim simulation "not bound"

Kiamur
Beginner
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I try to simulate the Quartus FFT IP core in Modelsim.

 

I succesfully simulated the example design which I also can generate from the IP generator GUI (IP Parameter Generator). However, I was not able to include my own tetbench in that simulation so that I now try to simulate the simulation files that I generate along the synthesis files in the "generate HDL" GUI in IP Parameter Generator like this:

 

fft_ip_generate.png

 

The files in the attachment (if_fft.qsys, fft_tb.vhd, adc.txt and compile_ip.do) can be used to re-create the problem:

I use if_fft.qsys in the IP Parameter Editor to generate the sysnthesis and simulation files as shown above.
Then, in modelsim, I navigate in the console to the folder "fft" of the output directory path shown also above.
In that folder I place the compile_ip.do, fft_tb.vhd and adc.txt files.

I type "source compile_ip.do" in the modelsim command line window and it uses the script to compile the testbench and then the msim_setup.tcl file that was automatically generated.

It all works to the point when the simulation is automatically started. Then I get this in the modelsim command line:

# Loading work.if_fft(rtl)
# ** Warning: (vsim-3473) Component instance "fft_ii_0 : if_fft_fft_ii_0" is not bound.

Since I handle in my testbench the if_fft component, I have no real clue what this "not bound" fft_ii_0 is. Of course it is some generic FFT IP component but I was hoping the the automatically generated msim_setup.tcl file takes care of correctly setting everything up so that this subcomponent gets properly bound for the simulation.

I would prefer a solution where I just have to fix the modelsim compilation scripts (compile_ip.do and msim_setup.tcl) instead of having to use Quartus in the loop.

I read that there is a native link function between Quartus and modelsim, but since I don't want to simulate a complete Quartus design, but also the IP with my testbench I would be very happy if I can just handle this issue via the scripts.

 

Thanky you!

Maik

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TingJiangT_Intel
Employee
998 Views

Hi there, the 'msim_setup.tcl' is missing. As you sourced it in the 'compile_ip.do', is this missed?



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Kiamur
Beginner
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Hi and thanks for looking into my problem.

 

I have included the .qsys file with which you can build the system (here: the IP core) in the platform designer.

If you have done that, then the msim_setup.tcl should be generated, too.

 

Best Regards,

Maik

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TingJiangT_Intel
Employee
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Hi there, thanks for you explanation. It seems that you've commented out the instantiation code for if_fft in the testbench. I'm not sure if this is the same testbench you are using.


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Kiamur
Beginner
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Yes, it is commented out...

 

But, the intantiation

 

 uut: entity work.if_fft_fft_ii_0
port map (
clk => clk,
reset_n => reset_n,
sink_valid => sink_valid,
sink_ready => sink_ready,
sink_error => sink_error,
sink_sop => sink_sop,
sink_eop => sink_eop,
sink_real => sink_real,
sink_imag => sink_imag,
fftpts_in => fftpts_in,
inverse => inverse,
source_valid => source_valid,
source_ready => source_ready,
source_error => source_error,
source_sop => source_sop,
source_eop => source_eop,
source_real => source_real,
source_imag => source_imag,
fftpts_out => fftpts_out
);

 

referencing to work.

 

makes the component declaration superflous.

 

I got this from another example that had more or less the same issue as I have here. I was hoping that, by doing everything like the example there would solve my issue, but it did not.

 

So in general:

 

Please use the qpf file in my zip into Quartus 18.1.

Please use the qsys to create the FFT IP in that project.

Please compile in Quartus 18.1.

Please start native link for simulation.

If the qpf file has all the settings as I have on my local machine, then it should start modelsim and load the design for simulation.

There, the initially mentioned modelsim "not bound message" should appear.

I am interested in getting rid of that "not bound" so that I finally can simulate the FFT.

 

Regards,

Maik

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TingJiangT_Intel
Employee
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Hi there, sorry for the delayed response. I'll try to investigate on this following your flow.


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TingJiangT_Intel
Employee
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Hi there, I tried your flow. I opened the qsys file and generated the HDL. But after compiled the design when I tried to execute the compile_ip.do , it showed that the msim_setup.tcl file didn't exist. I tried to recreat the project several times but still the same. Please let me know if anything has been missed. 


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TingJiangT_Intel
Employee
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Hi there, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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