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PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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Reference design to test MSI-x interrupt using Altera's PCIe AVMM IP Core.

Honored Contributor II

Hello All, 


I have successfully enumerated PCIe and I can see PCIe device.I have also performed read/write operation using DMA with PCIe root port.I have also tested legacy interrupt functionality.Now I am looking for the reference design to test MSI-x interrupt functionality.I found one reference design on altera wiki.However it is not working.Using signal tap, I figured out that custom component used to store MSI-x address and data in the design generates write request successfully when it receives interrupt i.e Avalon Master interface of the custom component works fine.However my linux driver doesn't get any interrupt. 


Would someone please help me to resolve this issue or provide some reference design to verify or test MSI-x interrupt functionality? 


Thank in advance, 


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